Interesting little read that. Thanks for posting.
I wish they had gone into more detail on their die stacking plans, but such is life.
Not much detail on anything really. It's interesting they give broad relevant topics. I kind of feel like a marketing guy made these slides.
The scary cost slide actually wasn't cost per transistor but cost per area, for a 250mm2 die at various nodes. So if this Zen2 chiplet is mass produced/reused in many products the costs should be semi-economical.
SiSoft benchmark for AMD EPYC 7702P 64-Core Processor (64c/128t @ 3.35ghz)
Spoiler alert: It's a monster.
Both systems became active again on SiSoft just before and after the Zen2 launch.
They get a lot more chips out of a wafer. And chiplet design ensures a more efficient die-savaging operation.Interesting. I don't think there's really that much demand for compute. It's marketing angle.
Slide 9, look at that cost for 7nm double or more than double from 12nm or 28nm.
And it gets worse with 5nm.
They did pretty well keeping the consumer costs low though, seeing where the 2600x and 2700x are listed.