A 64 modes- a 32 bit processor actually?

[0JK0]

Hi,

I continue working on my project, which was mentioned in my previous post here
and i ran on some strange conclusions. Takin into consideration all the modes of the Athlon 64 (you can check it out here and here) it turns out that A 64 is not fully an 64 bit processor even when you use the 64 os, along with 32 bit application- because maintaining the compatibility with those applications forces the Athlon to work in a Compatibility Mode , which in turn does not differ with 32 bit mode beside the address length. Before the premiere of the A64 we could read that beside full compatibility of their new Athlon 64 with 32- bit software , the chip was able to process not one, but two 32 bit instructions at the same time. However I read this information in the pre-premiere articles, and now I can't find any denial, neither approval of this fact. My q is does anyone know if it really works? If so does it apply to 32 bit mode or only to compatibility mode?

Looking for some serious enthusiasts. Thank you very much for any responses.

 

[aka1nas]

I'm not sure why you are stating it's not a fully 64-bit processor. From the second article you mentioned, I don't think that it's running in 32-bit compatability mode exclusively if it's running a 64-bit OS. Either the CPU sets the mode for each instruction individually, or it is running exclusively in 64-bit mode and XP-64 is doing compatability stuff behind the scenes in software(WoW?).

From the article:

With applications that run in legacy or compatibility modes, the Hammer can continue to use only the eight conventional 32 bit wide registers EAX, EBX, ECX, EDX, EBP, ESI, EDI and ESP (see graphic above). If the processor works in 64 bit mode, then the x86-64 architecture extends these eight registers via the "R" prefix to 64 bit.

As far as running two 32-bit instruction at once, that is kinda vague. What kind of instructions? FPU stuff? SSE-related?

 

[0JK0]

Originally posted by: aka1nas
I'm not sure why you are stating it's not a fully 64-bit processor. From the second article you mentioned, I don't think that it's running in 32-bit compatability mode exclusively if it's running a 64-bit OS. Either the CPU sets the mode for each instruction individually, or it is running exclusively in 64-bit mode and XP-64 is doing compatability stuff behind the scenes in software(WoW?).

From the article:

With applications that run in legacy or compatibility modes, the Hammer can continue to use only the eight conventional 32 bit wide registers EAX, EBX, ECX, EDX, EBP, ESI, EDI and ESP (see graphic above). If the processor works in 64 bit mode, then the x86-64 architecture extends these eight registers via the "R" prefix to 64 bit.

As far as running two 32-bit instruction at once, that is kinda vague. What kind of instructions? FPU stuff? SSE-related?

What I meant was that even if the processors is working in Compatibility Mode ( which is one of the sumode of Long Mode), despite it works with 64 bit OS it still only has 8 32 bit GPRs and 8 128 bit SSE registers as opposed to , relatively 16x64 bit GPRs and 16x 128 SSE register, which work in 64 bit mode. Therefore A 64 usues its full potenial only with 64 bit OS with 64 bit applications, right?

 

[Dravic]

Correct you will only really see the benefits of the 64bit CPU when using a 64bit OS and a 64bit application. Making a CPU 64bit allows the cpu to run 64bit long instructions not run 2 32 bit operations at the same time. Operations and instructions length are not the same thing.

The IPC of the Athlon cores is still 3. you can run 3 64bit operations or 3 32bit operations at the same time. Disregarding SSE type operations for a second here, as those are just shortcuts hard coded in for common SIMD functions. Going to 64bit will allow users to crunch much more data then before, but wont double operations per lock. This is where dual core and SMP come in, and even those wont double IPC unless it very predictable linear type of code like encoding/decoding.

The beauty in extending ia32 to x86-64 is that you don?t suffer any form of penalty when running 32bit code, you simple don?t use the extra register and instruction space. It?s an easy compatibility mode to use, and doesn?t require emulation to run ia32 code. Unlike Intel?s attempt at ia64 (itanium) epic CPU?s which had to run ia32 code in emulation.

I'm sure i'll be corrected where i'm incorrect....

 

[0JK0]

Originally posted by: Dravic
C Making a CPU 64bit allows the cpu to run 64bit long instructions not run 2 32 bit operations at the same time. Operations and instructions length are not the same thing.

Really, do operations have the length? What is the differance then?

 

[Dravic]

not, but there can only be 3 ops permormed per cycle on the athlon. I was just staying that being 64bit is not akin to running two 32bit ops at the same time. thats where dual core comes in