768-bit is slow, the GTX 295 already went past this with 896 bit.
AMD has actually gone back from a 512-bit bus to 256-bit because GDDR5 was fast enough, and NV managed to go from 512-bit for the GTX285 to 384 with the GTX480 while increasing the bandwidth from ~160 to ~177GB/s by going from GDDR3 to GDDR5.
right, and to explain why this happened. 512bit bus takes up twice the die space of 256bit bus.
if ram speed and GPU speed increase in tandem, there is no reason to increase the bus width. if the GPU speed increases much faster than the ram speed, then increasing the bus width can compensate and allows for greater bandwidth (to accommodate that extra GPU speed). when (individual) ram speed itself caught up, the bit width was safe to reduce.
http://www.anandtech.com/show/2977/...-gtx-470-6-months-late-was-it-worth-the-wait-Given the 384-bit bus, we initially assumed NVIDIA was running in to even greater memory bus issues than AMD ran in to for the 5000 series, but as it turns out thats not the case. When we asked NVIDIA about working with GDDR5, they told us that their biggest limitation wasnt the bus like AMD but rather deficiencies in their own I/O controller, which in turn caused them to miss their targeted memory speeds. Unlike AMD who has been using GDDR5 for nearly 2 years, NVIDIA is still relatively new at using GDDR5 (their first product was the GT 240 late last year), so we cant say were completely surprised here. If nothing else, this gives NVIDIA ample room to grow in the future if they can get a 384-bit memory bus up to the same speeds as AMD has gotten their 256-bit bus.
Less layers on the PCB, which also reduces cost.
So, when do you think we'll start to see the ultimate end cards start to feature that kind of bus speed?
This is another thing that could happend, both nvidia and amd could run into issues makeing small fast busses, and that again would force them to go up in size. Nvidia seems to have had a harder time with their memory busses, and have been useing bigger width busses to reach their needed memory bandwidth.Of course, this all assumes the memory controller can handle high RAM speeds.