Info 64MB V-Cache on 5XXX Zen3 Average +15% in Games

[Kedas]

Well we know now how they will bridge the long wait to Zen4 on AM5 Q4 2022.
Production start for V-cache is end this year so too early for Zen4 so this is certainly coming to AM4.
+15% Lisa said is "like an entire architectural generation"

 

[lobz]

I'm laughing hard while typing this: FX 5xxxX 3D. I purposely mangled 3dfx to avoid a lawsuit hehe
A great way for AMD to redeem the FX moniker of the 2000s

What an absolute monster the first FXs were, man! Still, selling those for a grand was nothing sort of disgusting. Truth be told, their cheaper stuff was also faster than Intel's most expensive, so yeah... I mean, the 5950 and 3950 were also not cheap, but at least they actually offer much more to their target segment (end-user productivity) than anything else on the market. Rodriguez & co. were just like 'our stuff is the fastest, but we have something even faster, so why not a thousand bucks?' That made them indistinguishable from Intel in terms of customer (un)friendly behavior.
So while Mr. Huang is a horribly arrogant money grab, he sure has had great outside idols at Intel and AMD over the past decades...

 

[Borealis7]

so 3D cache stacking is just an experiment on the 6000 series? Zen 4 will not have that?

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[leoneazzurro]

so 3D cache stacking is just an experiment on the 6000 series? Zen 4 will not have that?

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Quite probably we will see this technology on Zen4 too, it depends on which models (on servers, it is quite probable, on desltop, it will depend on the competitive performance relative to Intel).

 

[eek2121]

Quite probably we will see this technology on Zen4 too, it depends on which models (on servers, it is quite probable, on desltop, it will depend on the competitive performance relative to Intel).

If it is true, I imagine AMD will do the same thing as this time: Launch Zen 4 *without* caching (on the desktop at least) and later launch new SKUs *with* caching prior to launching Zen 5.

Zen 4 probably has considerable IPC uplift if that is the case.

 

[Zucker2k]

Zen 4 probably has considerable IPC uplift if that is the case.

What's the max LLC cache size of the top desktop Zen 4 chip? Is that information out?

 

[moinmoin]

so 3D cache stacking is just an experiment on the 6000 series? Zen 4 will not have that?

We had the discussion in this thread before that stacking is not available on each node from the start but is a capability that TSMC needs to build up first after the node itself.

Zen 4 being "delayed" may well be due to AMD wanting 3DX to be available on Zen 4 from the start. Who knows, with the total lack of announcements and hard dates either way.

 

[lobz]

We had the discussion in this thread before that stacking is not available on each node from the start but is a capability that TSMC needs to build up first after the node itself.

Zen 4 being "delayed" may well be due to AMD wanting 3DX to be available on Zen 4 from the start. Who knows, with the total lack of announcements and hard dates either way.

One thing is certain: this is not a one-off like "the majority of GPU customers are interested in the ~$200 segment" nonsense was.

 

[Joe NYC]

We had the discussion in this thread before that stacking is not available on each node from the start but is a capability that TSMC needs to build up first after the node itself.

Zen 4 being "delayed" may well be due to AMD wanting 3DX to be available on Zen 4 from the start. Who knows, with the total lack of announcements and hard dates either way.

TSMC N5 on N5 is set for H2 of 2022, so there were well may be a joint launch of Zen 4 by AMD and N5 on N5 by TSMC.

If Milan X has several layers of V-Cache by the time of Genoa Launch, it would not be a good idea if Genoa (no V-Cache) underperformed Milan X (with V-Cache) ...

 

[Mopetar]

Quite probably we will see this technology on Zen4 too, it depends on which models (on servers, it is quite probable, on desltop, it will depend on the competitive performance relative to Intel).

If it is true, I imagine AMD will do the same thing as this time: Launch Zen 4 *without* caching (on the desktop at least) and later launch new SKUs *with* caching prior to launching Zen 5.

Zen 4 probably has considerable IPC uplift if that is the case.

These are some good points as well and make me think a full Zen 3D lineup is less likely.

Doing that basically commits AMD to doing it for future products or it creates performance issues. If Zen 3D gives a 15% uplift from more cache and Zen 4 gives a 20% uplift from architecture and clock improvements then it looks rather unimpressive compared to Zen 3D offerings unless it also includes the extra cache.

Another interesting question. Could a Zen 4 die made on TSMC 5nm bond to a cache die made with TSMC 7nm assuming it was designed to link up? SRAM is another one of those components that isn't scaling as well, so AMD may not gain/lose much performance from shrinking the cache dies.

 

[jpiniero]

These are some good points as well and make me think a full Zen 3D lineup is less likely.

I don't think anyone should have expected the full lineup to get 3D but there's always rebrands.

 

[moinmoin]

Could a Zen 4 die made on TSMC 5nm bond to a cache die made with TSMC 7nm assuming it was designed to link up?

I think it was posted/mentioned earlier in this thread that TSMC's roadmap points to same node on same node being first, with mixing nodes coming at a later point.

I don't think anyone should have expected the full lineup to get 3D but there's always rebrands.

At this point I'm not even sure we'll see a "fuller lineup" akin to Zen/Zen+/Zen 2 again. Seems AMD is fine with APUs covering the more budget parts of the lineup starting with x700 and downward. And while V-cache on APUs would be nice I don't expect that to happen, at least not with the mainstream APU line (which is what's coming to the desktop).

 

[eek2121]

These are some good points as well and make me think a full Zen 3D lineup is less likely.

Doing that basically commits AMD to doing it for future products or it creates performance issues. If Zen 3D gives a 15% uplift from more cache and Zen 4 gives a 20% uplift from architecture and clock improvements then it looks rather unimpressive compared to Zen 3D offerings unless it also includes the extra cache.

Another interesting question. Could a Zen 4 die made on TSMC 5nm bond to a cache die made with TSMC 7nm assuming it was designed to link up? SRAM is another one of those components that isn't scaling as well, so AMD may not gain/lose much performance from shrinking the cache dies.

I suspect Zen 4 to have a much larger uplift based on leaks thus far. Just moving from 7nm to 5nm would give them considerable uplift. We know that the cores will be larger, and that the FPU will be beefed up. I'm expecting 30-40% at minimum TBH. 10-20% faster than Zen3D. WITHOUT caching.

I doubt AMD is going to hold the Zen 4 launch to ramp up Zen4 with 3D cache, that is why my hunch is that it will be later on. Genoa will probably see the 3D cache before desktop. AMD will use the cache versions as mid cycle refreshes so they can delay Zen 5 a bit longer. This allows them to stay off the same node Apple is on and potentially gives them more capacity while allowing them to continually leapfrog Intel. Note that Intel has been on a much faster cadence as of late (9-12 months), so this allows AMD to keep up with that cadence.

 

[Panino Manino]

No, I'd be more amused if they break out the 3Dnow! name for the marketing.

"Ryzen is 3DNow!"

Lisa, hire this man!

 

[Hans Gruber]

AMD should have released the Zen 3 threadripper 6 months ago. Even with very limited availability. That would have better positioned them against intel. When Intel says here is our new stuff vs. AMD. They would run into a wall of shit against threadripper.

 

[Joe NYC]

AMD should have released the Zen 3 threadripper 6 months ago. Even with very limited availability. That would have better positioned them against intel. When Intel says here is our new stuff vs. AMD. They would run into a wall of shit against threadripper.

If AMD is delaying the Threadripper so much, I wonder if it is going to be released with V-Cache. What sense would it make to release it in November without V-Cache and then a few months later, another set of SKUs with V-Cache?

 

[jpiniero]

If AMD is delaying the Threadripper so much, I wonder if it is going to be released with V-Cache. What sense would it make to release it in November without V-Cache and then a few months later, another set of SKUs with V-Cache?

I don't think you would see AMD do that. They would just wait until Zen 4. Threadripper doesn't have any competition and won't until Sapphire Rapids-X shows up and who knows when that will be.

 

[Mopetar]

I'm expecting 30-40% at minimum TBH. 10-20% faster than Zen3D. WITHOUT caching.

That's a rather large expectation and a bit hard to believe. It's certainly a bigger jump than anything we've seen since AMD launched Zen and that was only because Bulldozer and the iterations on it were bad by comparison.

 

[AMDK11]

I suspect Zen 4 to have a much larger uplift based on leaks thus far. Just moving from 7nm to 5nm would give them considerable uplift. We know that the cores will be larger, and that the FPU will be beefed up. I'm expecting 30-40% at minimum TBH. 10-20% faster than Zen3D. WITHOUT caching.

In my opinion, your expectations are too high. According to the Chinese forum about GoldenCove and Cortex X2, Zen 4 is a 20-25% increase in IPC.

 

[yuri69]

That's a rather large expectation and a bit hard to believe. It's certainly a bigger jump than anything we've seen since AMD launched Zen and that was only because Bulldozer and the iterations on it were bad by comparison.

Yea, comparing Zen1 - a casual, wide core with uop cache and a standard cache configuration - with BD/XV - an 'experimental', oddly narrow core, no uop cache and slow/horrible cache configuration - is easy.

Providing a 30% uplift to the current very optimized Zen3 sounds weird. Heck, even 15-20% IPC would be very cool. Mind you, Zen 3 is already hitting 5GHz so frequency gains are not really to be expected despite the 5nm TSMC.

Those 20+% figures are strange to me. So far Zen4 doesn't look like a revolutionary step, right? Maybe, Zen3 non-3d to Zen4 3D...

 

[Mopetar]

It might be easier to believe if Zen 3 was underwhelming, but we have the opposite case where Zen 3 delivered more than what most people were expecting. Adding another 30% on top of what's already the top CPU for most purposes would be rather amazing.

I mean Id love for it to be true, but I just don't think it's reasonable to expect that without any kind of performance leaks that would hint at that kind of uplift. Even the 15-20% you're proposing would be quite good. The extra 15% from stacked cache gets to that supposed 30%+ level so it may certainly be possible to get that from baseline Zen 3, but I don't think all chips would ship with it

 

[yuri69]

Zen3 is still a relatively small x86 core compared to recent Intel's. So blowing major core structures up seems a possible way to go. But this doesn't fit the recent AMD doc leaks.

 

[LightningZ71]

I doubt that the ST performance will rise by more than 15% for Zen4 on 5nm as N5 doesn't really clock that much higher than N7/N6. Any improvement in performance would have to come from major changes in architecture and/or improved caching. I can see a doubling of L2 being an obvious place for improvement. The enlarged FPU and improved capabilities are able to easily account for a big situational improvement in some benchmarks, skewing the "average" improvement heavily.

Where I expect to see a bigger uplift is in MT scores. N5 does do better with power by a notable degree and will allow usefully increased MT all core boost performance. Once thing that we didn't see as big of a boost in from Zen 2 to Zen 3 on the desktop was MT performance. Part of this was due to the fact that both were produced on TSMC N7, with very little improvements in power draw per core. Also, the improvement in memory throughput from DDR5 will also be a nice uplift in memory bound applications.

 

[Saylick]

Given the additional transistor budget TSMC's N5 brings, the "cheap and dirty" approach to developing Zen 4 would be to just tack on more caches, buffers, registers, execution units, etc. Knowing AMD, it just doesn't seem like that's in their blood. Perf/Area efficiency has been a hallmark of the Zen architecture, so I would expect they do a re-build of the core for Zen 4.

 

[andermans]

At the risk of turning this into the Zen4 thread, I think Chips and Cheese (https://chipsandcheese.com/2021/02/05/amds-past-and-future-cpus/) is up till now the only one who has dared to give an actual number (29% IPC uplift). At the time I'd be ready to declare that nonsense for being too early for a CPU that still had 18 months until release but they have been writing some solid (though non-leaking) content after so I'm kinda more on the fence now.

I think it is attractive to believe higher numbers because Intel increasing IPC At almost 20% for 2 gens in a row on desktop (though Cypress Cove had other issues) within a single year and Zen4 looking like it is taking 2 years. Belief doesn't make a product though.

I believe that a lot of the structures that could be changed are not really sized in the gigabyte leaks (stuff like various queues and such, like e.g the ROB or the internal register file), so there are definitely possibilities, but also very little hints what changes they did make and how much those help.

 

[AMDK11]

Up
Sunny / CypressCove and GoldenCove are, in fact, not one year apart.
Project work:
SunnyCove 2016-2018(relase 2019)
GoldenCove 2018-2020(relase 2021)

WillowCove (x86 SunnyCove with a redesigned cache subsystem) and RaptorCove were certainly working in parallel.
I think work was going on in parallel on RedwoodCove which was finished in June. Perhaps it was RedwoodCove that work lasted from 2017, which would give 3-4 years of design.
The only certainty is SumnyCove, to which Intel admitted that the work started in 2016, and assuming 18-month design cycles, it will be completed in 2018 and made in silicon to be released in 2019.