Info 64MB V-Cache on 5XXX Zen3 Average +15% in Games

[Kedas]

Well we know now how they will bridge the long wait to Zen4 on AM5 Q4 2022.
Production start for V-cache is end this year so too early for Zen4 so this is certainly coming to AM4.
+15% Lisa said is "like an entire architectural generation"

 

[DrMrLordX]

Don't think it'll be Q4. AMD has said 2H22, but don't be surprised if they launch it earlier to trip Intel up.

I mean sure, that'd be okay too I guess, but they really should be aiming for Jan-Apr 2022 (Q2 latest). Unless they just don't care anymore. As good as Zen3d might be, I don't think it obviates the need for them to launch their new platform with a desktop halo product to go with it along the generally-accepted cadence of 15-18 months.

N6 would be Rembrandt, would it not? Extra N7 or other flavor of 7nm @ TSMC will be taken up by the IOD as there have been strong rumors and suggestions that AMD will solely rely on TSMC for the entire package including the IOD for Zen 4 and future Zens. It's going to be interesting to see how the two companies pull this off considering the shortages will last until 2023 if not midway of that year.

From what I've heard, TSMC really wants everyone on N7 to transition away to N6 due to reasons of cost. It would be eccentric moving forward for AMD to take any N7 wafers from TSMC. I'm guessing they're going to try to move N7+ and N7P customers - such as they are - to N5 and derivatives. But that's just a guess, and I don't think AMD even uses those nodes anyway (which still confuses me, but whatever!).

Your Genoa/Bergamo suggestion makes sense because they'd have a head start and have chiplets that didn't pass Epyc standards be up for binning on Ryzen products or future Threadrippers. That said, I wouldn't be surprised if AMD begins production in a few months or close to the end of the year. Or even now. The upcoming fall and winter is going to prove difficult given COVID is still rampant and the ramp down and or pause for Lunar New Year.

I'd say we'll get hardware sometime in summer if my May the 4th or 5/5 prediction falls flat on its ass.

We will see. I will concede that there is a possibility that failed Genoa CCDs may comprise early Raphael, and that any aggressive push to saturate ODM channels with Genoa will just make it easier for them to launch Raphael earlier than Q4 2022 (which is a commonly rumoured launch quarter).

Do we know what AMD's MCM consumer cards will utilize?

I have no clue.

April-June release goes with AMD's 12-18 month cadence.

It's actually 15-18 month now (bleh). Zen1->Zen+ was 13 months, ->Zen2 was 15 months, and ->Zen3 was 18 months. At least on the consumer side. Things were a little different on the server side but that is to be expected, since that is their primary focus at the moment. In any case, Nov 2020 saw the Vermeer launch, so Raphael would be Jan-Apr 2022 assuming AMD is pegging their cadence to Raphael and not Zen3D/Warhol/whateveritis.

Late '22 wouldn't make sense.

If AMD is saying "eh let's just let Zen3d take Raphael's spot and delay Raphael" then all bets are off.

 

[Joe NYC]

From what I've heard, TSMC really wants everyone on N7 to transition away to N6 due to reasons of cost. It would be eccentric moving forward for AMD to take any N7 wafers from TSMC. I'm guessing they're going to try to move N7+ and N7P customers - such as they are - to N5 and derivatives. But that's just a guess, and I don't think AMD even uses those nodes anyway (which still confuses me, but whatever!).

We know there will be new stepping of Zen 3. There is a non-zero chance that AMD moved Zen 3 to N6.

If it is really in TSMC interest that customers move to N6, there is no doubt that this was communicated to AMD, which is the biggest customer of N7. But, this is just my speculation.

 

[lobz]

No rush, Intel Alder lake won’t move mountains anyway.

You can't know that either. Why do people act like A) AMD has zero chance against Alder the Mighty or B) nah, ADL poses no real threat, launching a counterpart 3-6 months later is more than fine? I also urge mr. Zucker and eek 21 to read this comment as well, not only those comments where I dare to say something against Intel's arrogance.

 

[lobz]

AMD showed one Zen 3D on May 31st. If they make 1 per day from May 31st, they will have higher launch Zen 3D on September 9 (101 chips) than Intel had of Pentium 1 GHz - 100 CPUS - when Pentium 1 GHz launched.

They've said plain and simple: it goes into production at the end of the year.

 

[Vattila]

They've said plain and simple: it goes into production at the end of the year.

My recollection of Lisa Su's statement is that they will be "ready to start production by the end of this year", and considering the context was her V-Cache announcement, my understanding is that the determining factor for the schedule is the underlying hybrid bonding technology, which is a packaging technology. The CCD chiplet has been in volume production for a while now, and there is no reason to think the V-Cache chiplet is not ready to go as well, as these are made on the same tried and tested process node.

This understanding also correlates with TSMC's roadmap for their SoIC hybrid bonding technology. From this viewpoint, what is likely to determine AMD's schedule is the ramping of the packaging capacity, as hybrid bonding requires cleanroom level of cleanliness and precision, which is beyond what the packaging (OSAT) companies currently are capable of. AMD depends on TSMC here.

So, I think it is pessimistic to interpret Lisa Su's statement to mean the full three months chip production time from wafer start to chip delivery, starting from the very end of the year. It is more likely that the chiplets are ready to go, with the packaging capacity coming online in the coming quarters, in line with TSMC's execution of their packaging roadmap. In short, if all goes well, we may see product announcement and launch before the end of the year.

Obviously, it would be highly advantageous for AMD to have products ready with V-Cache around the time Intel launches "Alder Lake". Having V-Cache offered in the upcoming Threadripper generation would also be highly desirable. It will be interesting to see how the schedules pan out.

 

[lobz]

My recollection of Lisa Su's statement is that they will be "ready to start production by the end of this year", and considering the context was her V-Cache announcement, my understanding is that the determining factor for the schedule is the underlying hybrid bonding technology, which is a packaging technology. The CCD chiplet has been in volume production for a while now, and there is no reason to think the V-Cache chiplet is not ready to go as well, as these are made on the same tried and tested process node.

This understanding also correlates with TSMC's roadmap for their SoIC hybrid bonding technology. From this viewpoint, what is likely to determine AMD's schedule is the ramping of the packaging capacity, as hybrid bonding requires cleanroom level of cleanliness and precision, which is beyond what the traditional packaging (OSAT) companies are capable of. AMD depends on TSMC here.

So, I think it is pessimistic to interpret Lisa Su's statement to mean the full three months chip production time from wafer start to chip delivery, starting from the very end of the year. It is more likely that the chiplets are ready to go, with the packaging capacity coming online in the coming quarters, in line with TSMC's execution of their packaging roadmap. In short, if all goes well, we may see product announcement and launch before the end of the year.

Obviously, it would be highly advantageous for AMD to have products ready with V-Cache around the time Intel launches Alder Lake. Having V-Cache offered on the upcoming Threadripper generation would also be highly desirable. It will be interesting to see how the schedules pan out.

That's correct. I just wanted to point out, how unfeasible it is, expecting AMD to be producing those chips right now.

 

[leoneazzurro]

It's quite likely they are in preproduction, btw, since a while, as there is a lot of validation needed, as well as polishing the yields and so on...

 

[Joe NYC]

They've said plain and simple: it goes into production at the end of the year.

Regardless, AMD should launch Zen 3D shortly after Alder Lake launch, whether they have 100, 100,000 or 1,000,000 stockpiled.

 

[Joe NYC]

That's correct. I just wanted to point out, how unfeasible it is, expecting AMD to be producing those chips right now.

You make it sound like there needs to be a priest who comes to the packaging facility with holy water, and all chips produced before are unholy and don't count, and only the chips after the production facility was blessed with holy water count.

No. TSMC and AMD are running test runs. Die coming in are first tested and then the bonded chips are tested.

5 wafer worth of good Zen 3D? Good enough to launch.

It's not like people are going to be shocked that there may be shortages in 2021...

 

[dr1337]

That's correct. I just wanted to point out, how unfeasible it is, expecting AMD to be producing those chips right now.

They're definitely not making many desktop ryzen chips with 3d stacking but they are making enough to have run benchmarks and show at computex. I still think they're using the cache chiplets on the CRAY super computers they're building right now and its likely that all of the ryzen production will be just in time for the holidays or CES 22 launch at the latest.

I will say its not impossible that AMD demo'd really early unvalidated engineering samples at computex, but I don't think that's what they did.

 

[Topweasel]

DDR5 should be ready by Q1 2022 as long as the motherboard OEMs can deliver.

In unlimited quantity?

Nah. But there should be enough available for the early adopters. The only lagging indicator is that Intel doesn't have a server/workstation platform using it yet, so you don't get any of the lovely early-market green generic DIMMs on eBay like you did at the DDR3 and DDR4 "launch" (it was not a singular event).

DDR5 was available on Amazon for a bit. It even had an add to cart button (I almost bought it for fun). Then it sold out. I suspect in the next 2 months we will begin to see it in stock.

My Point about it was that memory manufacturers aren't going to produce the memory in volume till the their is a real volume solution using it. Till Intel launches with DDR5, its going to be a lot more expensive than DDR4. The ones available are $300-$400 for a 32GB stick. Could be worse but not by a lot.

 

[Topweasel]

I always feel Toms got waaaaay to much credit for the P3 recall. He was a bit of an Intel apologist at the time. He did do the article that really stressed that Intel needed to recall it but until presented with insane amount of proof the site spent most of the time suggesting any of the rumors were a bad setup. Even Anands hand in it was rather small, just loaning a chip for testing.

It started with a site I can't remember. Little bit more workstation and mostly Linux related, they had a kernal compile issue. The crash was something they only saw on overclocked chips back in the day. They got in touch with Kyle. He confirmed his chip acted the same and compared it to trying to force a slower PIII to 1GHz. They tried to talk to Toms at the time but he kind of blew them off. They got in touch with Anand, he hadn't seen anything bad, but didn't need the chip. So Kyle, Linux dude, and Anand sent their CPU's and the test case that brought up the issue to Tom. At that point Tom tested his own. Had the same issue. He then releases his Article and Intel recalls the CPU like a day later. While I am not entirely sure Intel recalls the CPU without Tom's input then. He wasn't willing to believe in any issue until he got like $4k in CPU's begging him to just give it a try.

Stopped reading Toms after the week long torture test with AMD and Intel he did like year after that.

 

[lobz]

You make it sound like there needs to be a priest who comes to the packaging facility with holy water, and all chips produced before are unholy and don't count, and only the chips after the production facility was blessed with holy water count.

I simply pointed out a single fact that AMD's CEO publicly stated in an official presentation, I had and/or still don't have ANYTHING ELSE that I've supposedly had hidden behind my words. Can you please explain to me what you're talking about and where exactly have I sounded like any sort of this bizarre dream scene of yours?

Or is this just the week where people got infected with some lunacy-inducing disease where they come up with the wildest and most irrelevant accusations they can think of?

 

[Joe NYC]

I simply pointed out a single fact that AMD's CEO publicly stated in an official presentation, I had and/or still don't have ANYTHING ELSE that I've supposedly had hidden behind my words. Can you please explain to me what you're talking about and where exactly have I sounded like any sort of this bizarre dream scene of yours?

Or is this just the week where people got infected with some lunacy-inducing disease where they come up with the wildest and most irrelevant accusations they can think of?

And I said to that that AMD can announce, launch with low volume, using the chips that passed testing. There is nothing wrong with those chips that were used for testing and passed.

That's the reason I brought up Pentium 3 at 1 GHz. It is not even comparable. Intel could only harvest a fraction of a percent to get 1 GHz Pentium 3. AMD can get > 99 out of 100 from bonding at full production after both chips past their own test and are determined to be good die.

There is no reason for AMD to give Intel a PR win if AMD already has better chips that can beat Alder Lake - running at mainstream, non-exotic platform.

 

[Topweasel]

You make it sound like there needs to be a priest who comes to the packaging facility with holy water, and all chips produced before are unholy and don't count, and only the chips after the production facility was blessed with holy water count.

But that is exactly how it works. As AMD is testing, sending chips out for validation and so on, they are specifically tracked as test equipment and can't be used, they need to track and count by batches and only as they submit for finalization for production would they start producing chips that could be used in for sale. So yeah before X day, those 3d cache chips can't and won't be used.

And I said to that that AMD can announce, launch with low volume, using the chips that passed testing. There is nothing wrong with those chips that were used for testing and passed.

That's the reason I brought up Pentium 3 at 1 GHz. It is not even comparable. Intel could only harvest a fraction of a percent to get 1 GHz Pentium 3. AMD can get > 99 out of 100 from bonding at full production after both chips past their own test and are determined to be good die.

There is no reason for AMD to give Intel a PR win if AMD already has better chips that can beat Alder Lake - running at mainstream, non-exotic platform.

This is where you are right, it's the Threadripper philosophy. They only needed so much stock, much less than people tend to think that they could keep stock with using 95th percentile dies. As long as AMD is still selling the 3d cacheless 5k Ryzen, it doesn't matter what the success rate is.

Also because 3d cache requires it to mate to the cache on the CPU, AMD has to create the cache chips for the specific compute dies. AMD won't offer this on Milan because it means revalidating a whole bunch of chips with Genoa coming so soon. Genoa would be the first implementation (potentially) for server.

The math on this is easy. 3D'd Zen 3 is what we though Zen 3+ was. At time of production Ryzen Zen 3 desktop chips will be the only products that will be using the tech. It's a perfect hold over till Zen 4 hits desktop and allows them to ship Genoa first. To top it off, its potentially why we haven't seen Zen 3 Threadripper yet. Potentially as Genoa launches I see AMD taking that Milan production and using it for 3d cached Zen 3 for Threadripper.

 

[jpiniero]

AMD won't offer this on Milan because it means revalidating a whole bunch of chips with Genoa coming so soon. Genoa would be the first implementation (potentially) for server.

That's not true. There is going to be a Milan-X. When it will be released and if it will just be a few customers remains to be seen.

 

[Joe NYC]

But that is exactly how it works. As AMD is testing, sending chips out for validation and so on, they are specifically tracked as test equipment and can't be used, they need to track and count by batches and only as they submit for finalization for production would they start producing chips that could be used in for sale. So yeah before X day, those 3d cache chips can't and won't be used.

Does that mean they have to hold them back? But at some point, if the combined chip tested fine, why can't it be released for sale?

This is where you are right, it's the Threadripper philosophy. They only needed so much stock, much less than people tend to think that they could keep stock with using 95th percentile dies. As long as AMD is still selling the 3d cacheless 5k Ryzen, it doesn't matter what the success rate is.

that's a very good point.

Also because 3d cache requires it to mate to the cache on the CPU, AMD has to create the cache chips for the specific compute dies. AMD won't offer this on Milan because it means revalidating a whole bunch of chips with Genoa coming so soon. Genoa would be the first implementation (potentially) for server.

Given that Genoa is a new platform and it will be a slow ramp, crossover from Zen 3 to Zen 4 will likely be mid 2023.

That's a lot of time and a lot of Milan sales between now and then. I think it makes sense to validate Milan X with V-Cache for a subset of SKUs.

To top it off, its potentially why we haven't seen Zen 3 Threadripper yet. Potentially as Genoa launches I see AMD taking that Milan production and using it for 3d cached Zen 3 for Threadripper.

Now, there are 2 different versions of Threadripper - regular and Pro. Regular may be launching soon.

I wonder if they will release the Pro with V-Cache.

 

[lobz]

And I said to that that AMD can announce, launch with low volume, using the chips that passed testing. There is nothing wrong with those chips that were used for testing and passed.

That's the reason I brought up Pentium 3 at 1 GHz. It is not even comparable. Intel could only harvest a fraction of a percent to get 1 GHz Pentium 3. AMD can get > 99 out of 100 from bonding at full production after both chips past their own test and are determined to be good die.

There is no reason for AMD to give Intel a PR win if AMD already has better chips that can beat Alder Lake - running at mainstream, non-exotic platform.

Can you please answer my question before you further elaborate every single possible scenario in full detail that could happen in the industry? Because you kind of ridiculed me for no reason at all. I haven't said anything either about the launch or about the communication of a future product.

 

[DrMrLordX]

My Point about it was that memory manufacturers aren't going to produce the memory in volume till the their is a real volume solution using it.

Right, like a ubiquitous server/workstation platform for which millions of generic DIMMs are cranked out en masse. Then aftermarket OEMs will start binning ICs and produce enthusiast DIMMs and the cycle repeats itself. DDR4 got its launch in the x86 world with Haswell-EX (if I recall correctly) which got the ball rolling. DDR5 hasn't had that kind of a launch yet to push the technology.

 

[Joe NYC]

Can you please answer my question before you further elaborate every single possible scenario in full detail that could happen in the industry? Because you kind of ridiculed me for no reason at all. I haven't said anything either about the launch or about the communication of a future product.

My reply was to your post here:

That's correct. I just wanted to point out, how unfeasible it is, expecting AMD to be producing those chips right now.

AMD / TSMC are producing the those chips, and there is an assembly step that is being tested.

AMD CEO said these will be in production before the end of the year, which does not mean December 31, it could be August 1. And it is not a start of a wafer fabrication process, it is an assembly step after wafers have been fabricated.

There is a market demand for these chips (desktop variant) to be launched in Q4 2021, and I expect AMD and TSMC will meet this market demand.

I guess you don't. Let's see who will turn out to be right.

 

[lobz]

AMD CEO said these will be in production before the end of the year, which does not mean December 31, it could be August 1.

Oh I see, so you were just mistaking this forum for some twisted cynical scrabble game platform that I don't know of. Sorry man, I don't swing that way, but you go ahead and have a blast with the others nonetheless!

 

[Karnak]

It's actually 15-18 month now (bleh). Zen1->Zen+ was 13 months, ->Zen2 was 15 months, and ->Zen3 was 18 months. At least on the consumer side.

Actually 16 months between Zen2 and Zen3 (07/19 -> 11/20).

Pretty confident that we'll see an early/mid Q3 release for Zen4.

 

[Joe NYC]

Oh I see, so you were just mistaking this forum for some twisted cynical scrabble game platform that I don't know of. Sorry man, I don't swing that way, but you go ahead and have a blast with the others nonetheless!

What?

Then, if it turns out I was closer to the rollout of V-Cache, would it that mean you were playing cynical games?

How about just calling it a difference of opinion?

 

[lobz]

What?

Then, if it turns out I was closer to the rollout of V-Cache, would it that mean you were playing cynical games?

How about just calling it a difference of opinion?

No it would not, because I'm not pretending to have supernatural powers and know what certain companies are planning behind the scenes. I repeated what was told publicly, pointing out its contradiction to expecting something to happen several months before it's due. When you practically tell me that 'by the end of the year could mean 1st of August as well', I can't help but think that you're being 100% cynical just to mask the silly nature of your first answer to me, which didn't make any sense in the first place.

If AMD released consumer CPUs with V-Cache tomorrow, your comment would still be either cynical or silly, depending on your intentions when you've posted it.

 

[Joe NYC]

No it would not, because I'm not pretending to have supernatural powers and know what certain companies are planning behind the scenes.

It's called analysis.

That both TSMC and AMD have superb management team, and that these management teams recognize market potential of this breakthrough technology and will prioritize it.