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Info 64MB V-Cache on 5XXX Zen3 Average +15% in Games
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moinmoin
Diamond Member
Sometimes it seems like Charlie constantly is in a bad mood with everything, much of what others wouldn't bother with. But if you manage to pick out the noteworthy info from that he's still a good source.
Regarding latency of X3D reminder of the nice write ups at Chips and Cheese from January:
chipsandcheese.com
chipsandcheese.com
Regarding latency of X3D reminder of the nice write ups at Chips and Cheese from January:
AMD’s V-Cache Tested: The Latency Teaser
If you were like us and were surprised that AMD announced 3D V-Cache back in August and wondered how AMD would be able to pull this off, well, we have a teaser article for you today regarding V-Cache’s latency!
chipsandcheese.com
Deep Diving Zen 3 V-Cache
This is the deeper dive of AMD’s V-Cache that we teased with our short latency article and we will be covering a little more on the latency front along with the bandwidth behavior of V-Cache and the performance of V-Cache SKUs.
chipsandcheese.com
Det0x
Golden Member
Pretty sure thats a MSI bios no ?
*edit*
yepp thats an MSI layout
X570 GODLIKE E7C34AMS.1G3 can be found here
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MadRat
Lifer
Why aren't bus speeds increasing over time? We've been saddled with 100 MHz going on three decades? They should have been several times faster by now. It would definitely help to uncork video with the relative jump in bandwidth. They climbed quickly from 4 MHz incrementally to 66 MHz in short order. Then hopped from 66 MHz to 100 MHz and froze? That makes no sense, especially how much technology has improved over time.
Here we are excited about a 7 MHz bump. Whoopee.
Here we are excited about a 7 MHz bump. Whoopee.
nicalandia
Diamond Member
Also Undervolting is possible and quite impressive too. Same performance at nearly half the power and half the heat
wccftech.com
Wccftech Reader Tunes His AMD Ryzen 7 5800X3D Into a Efficiency Monster With Undervolting: Same Performance at 1V, 57W Peak Power at Sub-1V
Our reader has undervolted his AMD Ryzen 7 5800X3D CPU and turned it into an incredibly efficient chip that runs cooler & draws lower power.
wccftech.com
Insert_Nickname
Diamond Member
That was due to multipliers becoming common. The "bus clock" is merely a reference, everything else runs multipliers off it. That's why it's a bad idea to change it, as every bus in the system will run out of spec*. You could use pretty much any frequency for the purpose, I just think they settled on 100MHz*2 as a nice round number.
Back when there was a front side bus and back side bus it was important. Not today.
*Fun Fact; back when the Intel 440BX chipset was around, it could do 133MHz FSB (vs 100MHz officially) but doing so would run the AGP port out of spec. Some graphics cards could tolerate that, but others couldn't.
*2 Atom derivatives actually use an 83MHz reference clock. So it's not unheard of to use something else.
In Socket 7 era (yeah, I'm that old), 33, 66, 100 (and I think 133?) Mhz were the usual values.
Other frequencies were available on good boards like 50, 75, 83.3. AMD even used 95 MHz I think.
Needless to say, PCI bus often didn't like *at all* the overclocking neither did the peripherals. Running PCI at 25MHz instead of 33.3 (e.g. bus speed of 50, 75) was safe if slightly uninteresting but running it at 37.7 was often the practical limit. 41.5 Mhz did corrupt a whole lot of HDD (83.3Mhz bus speed).
That era was fun, though.
Other frequencies were available on good boards like 50, 75, 83.3. AMD even used 95 MHz I think.
Needless to say, PCI bus often didn't like *at all* the overclocking neither did the peripherals. Running PCI at 25MHz instead of 33.3 (e.g. bus speed of 50, 75) was safe if slightly uninteresting but running it at 37.7 was often the practical limit. 41.5 Mhz did corrupt a whole lot of HDD (83.3Mhz bus speed).
That era was fun, though.
Insert_Nickname
Diamond Member
My Epox MVP3G2 had 112MHz as the limit.
nicalandia
Diamond Member
This is a Diagram I draw of the Structural Silicon Die on top of a thinned down CCD/L3D , that is a whole lot of structural of silicon area.
AMD Zen3 CCD die area is 74 mm^2
The combined area of the Structural Si flanking the 3D V-Cache is 33 mm^2 and the L3D Die is 41 mm^2
The top Structural Support die is a chunk of 74 mm^2, so in total AMD has invested 107 mm^2 of Structural grade Silicon for Support and 115 mm^ High grade Silicon for Logic/SRAM, That is a total of 222 mm^2 per finished 3D V-Cache CCD die as compared to a regular CCD which is only 72 mm^2
AMD Zen3 CCD die area is 74 mm^2
The combined area of the Structural Si flanking the 3D V-Cache is 33 mm^2 and the L3D Die is 41 mm^2
The top Structural Support die is a chunk of 74 mm^2, so in total AMD has invested 107 mm^2 of Structural grade Silicon for Support and 115 mm^ High grade Silicon for Logic/SRAM, That is a total of 222 mm^2 per finished 3D V-Cache CCD die as compared to a regular CCD which is only 72 mm^2
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Structural silicon most probably is trash silicon. Nowhere near the purity needed for circuitry and very much cheaper also.
Probably doing this as the die thinning operations are geared for future multi-layer cache CPUs. You would want the tru-vias on each layer to be short. The only variable would be the structural layers thickness.
It is a bit of a niche product, but gaming is a big enough niche to justify a consumer product. It does well enough in certain HPC and server-based workloads that it makes sense there as well.
But Charlie himself is often pretty abrasive and isn't afraid of voicing his opinions. For someone who doesn't care about gaming, a 5800X3D is an extra $100 for a loss of performance in most applications.
Maybe it's related to whatever it was a few weeks (or maybe months at this point) that had him awfully upset at AMD for whatever reason.
He's ragged on plenty of other products from various other companies, so this isn't particularly unusual if you've followed him long enough.
Silicon is cheap, really cheap. It's the mask sets and time it takes to actually build up all the different layers and structures that make chips expensive. Just bulk silicon to add for structure of this size is probably measured in pennies, maybe dimes.
nicalandia
Diamond Member
AMD is getting it's feet wet with 7nm 3D V-Cache. This is just the beginning(Ending with the Biggest Bang for the AM4 Platform), Vertical Die stacking is the future of computing.
I'm not sure how much it will be used if it presents significant cooling issues.
The more interesting applications may be in creating silicon bridges that contain additional cache. There was a GPU patent someone brought up a while ago where AMD proposed essentially that and rumors suggest that Navi 31 is using that kind of design. Basically the infinity cache gets moved to other silicon that can be optimized for SRAM density and is used as a bridge between GPU chiplets. It's not quite that simple, but it's not really a stacked design in the way you're likely imagining.
The more interesting applications may be in creating silicon bridges that contain additional cache. There was a GPU patent someone brought up a while ago where AMD proposed essentially that and rumors suggest that Navi 31 is using that kind of design. Basically the infinity cache gets moved to other silicon that can be optimized for SRAM density and is used as a bridge between GPU chiplets. It's not quite that simple, but it's not really a stacked design in the way you're likely imagining.
...and as expected, these manufacturers start trying to break the OC limitation.
MSI To Enable AMD Ryzen 7 5800X3D BCLK Overclocking With Upcoming AGESA 1.2.0.7 BIOS, Benchmarks Show 5% Gain With 4.86 GHz Overclock
MSI will be rolling out its AGESA 1.2.0.7 BIOS soon which comes with fixes & enables BCLK overclocking for AMD Ryzen 7 5800X3D CPU.
wccftech.com
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nicalandia
Diamond Member
Water Cooling...
"TSMC's goal is to develop cooling solutions for waste heat in the range of 10 W per square millimeter. Depending on the size of the chip, these 10 W/mm² are very ambitious. For larger chips (500 mm² and more), TSMC is targeting a TDP of 2,000 W (2 kW). "
2 KW Of High Performance 3D Server like CPU(>500 mm^2) at 62C
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DrMrLordX
Lifer
It goes toe-to-toe (or better!) with the 12900KS which is already at the realistic clockspeed limits for non-custom cooling. There really isn't any significant overclocking you can do on either AMD or Intel chips to get past that point in a game.
Interesting about water. Everything dissolves in water, especially pure water. Wonder about any secret additives.
nicalandia
Diamond Member
Everything except Sand, more precisely Silicon dioxide (SiO2)
Just checked this. Probably too little to matter for a small closed loop, and the cooling channels would be much bigger than circuitry features, so no real distortion possible.
Silicon dioxide has a water solubility of 0.12 g/L, whereas for example silicon carbide is water insoluble
Edit: As an aside, I've done some work with hydroponics and you need to add Si to the solution for some plants.
That seems more of an issue with this the first iteration of v-cache CPUs than a fundamental issue with the technology.
I'm also not sure that water cooling is a viable solution if this is supposed to be able to expand beyond a niche product for gamers that want nothing short of the best. But if there aren't enough other niches for v-cache anyway then it hardly matters because only the crowd that wants to use a water block in their CPU/GPU already would buy one.
You're probably right. Like I said, the demo was unoptimized for PC. I think Lumen and or Nanite have not been properly tuned yet for multithreaded CPUs, plus like Makaveli said, the dual CCD issue might be causing latency problems.
Panino Manino
Golden Member
Overclock is a means, not an end.
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