4th Generation Intel Core, Haswell summarized

[ShintaiDK]

So it's safe to say there is no embedded memory for the GPU per the rumors that have been floating around?

It was a forum/sensationalist site creation...

 

[Idontcare]

It was a forum/sensationalist site creation...

You can't blame them though, Intel showed off an early Haswell package sans the IHS which clearly showed it was an interposer PCB with a chip not attached yet.

Was no small leap of the imagination for the conclusion to be made that the interposer must be used for MCM'ing some dram onto the CPU package.

 

[piesquared]

pieaquared, you are being unnecessarily negative. No one seriously expected a 400% improvement over IVB, not on iGPU side and certainly not on CPU side. Which company has offered that kind of upgrade in less tha 12-14 months over their current line-up?

You are naive to set your expectations so absurdly high, by these standards all AMD products in the last three years must be unusable rubbish.

Intel's graphic drivers certainly used to suck, but they have been steadily improving. As a linux user I am very sensitive to drivers, I can confidently say SNB marked the turning point for Intel. It can only get better from here on. They haven't been a player in the gaming segment, but they need a product first to get the game devs interested and improve their drivers even more.

Funny. expectations were set by inetl propaganda so the fanboys and shills could dismiss everything on the market and promote the myth that inetl doesn't suck at producing graphics hardware and software, which they do. The naivity comes from inetl and their shills for thinking everyone would fall hook line and sinker for their propaganda and marketing pitch. It'll be interesting to watch future backpedaling when that 2x number starts to diminish even further.

Of course it can only get better, it can't get any worse. If SB was a turning point intel left the road. I suppose this is why Win8's GUI has been dialed back 5 years, so inetl's hardware can render it too. Wouldn't be the first time, Vista comes to mind Even Win8's new logo is intel graphic friendly.

Nothing to see here but marketing fluff.

 

[Idontcare]

Do you know what thread-crapping is?

 

[piesquared]

Yeah I see it in AMD threads all the time. See it from mods quite often also.

 

[Sweepr]

Do you know what thread-crapping is?

Try to understand him. The possibility that Haswell GT3 (2x IB GT2) comes close/matches Kaveri graphics must really hurt a fanboy's feelings. Expect a lot of talk about how Intel drivers suck from these users from now on as the performance gap gets smaller and smaller.

 

[exar333]

Funny. expectations were set by inetl propaganda so the fanboys and shills could dismiss everything on the market and promote the myth that inetl doesn't suck at producing graphics hardware and software, which they do. The naivity comes from inetl and their shills for thinking everyone would fall hook line and sinker for their propaganda and marketing pitch. It'll be interesting to watch future backpedaling when that 2x number starts to diminish even further.

Of course it can only get better, it can't get any worse. If SB was a turning point intel left the road. I suppose this is why Win8's GUI has been dialed back 5 years, so inetl's hardware can render it too. Wouldn't be the first time, Vista comes to mind Even Win8's new logo is intel graphic friendly.

Nothing to see here but marketing fluff.

Interesting how Intel said 50% from GT1 to GT2 and it was exactly that. Why would they lie here?

If anyone here is a shill, I don't think anyone has a hard time telling who that person is...:hmm:

 

[AtenRa]

With all seriousness, where is the 2x IB GT2 in Unigine Heaven ?? All i see is power consumption. No settings or resolution mentioned.

Im not implying its not possible but i haven't seen any fps numbers yet.

 

[Ken g6]

Was hoping for the 4x ivy bridge performance

Technically, in theory, Haswell provides this! At least for "select" work loads. You get 2x sse2 integer performance with avx2, then 2x that performance again for fused multiply-adds.

Of course, there's hardly any useful work that actually consists of only vectorized fused multiply-adds. Maybe Collatz conjecture work? (It has loads too, but those can be done in parallel at 2x-4x the speed of Ivy on integer work - I'm not sure which, but I doubt either will bottleneck it.)

 

[pelov]

Interesting how Intel said 50% from GT1 to GT2 and it was exactly that. Why would they lie here?

If anyone here is a shill, I don't think anyone has a hard time telling who that person is...:hmm:

In synthetic benchmarks it was doubled, in real world gaming scenarios the figures weren't quite as high. You sort of expect that because of how it's going to depend on drivers and the diversity of titles that the GPU is tasked with.

Correct me if I'm wrong, but didn't Anand state that at most the improvement from IB was in the low teens and not 10%+? Let's not Bulldozer ourselves here. Despite the FPU improvements this processor looks to be mostly perf-per-watt and GPU centric. Not that I'm complaining, that's exactly what I wanted

 

[IntelUser2000]

Correct me if I'm wrong, but didn't Anand state that at most the improvement from IB was in the low teens and not 10%+?

I'm not sure how 10%+ is different from this: http://www.anandtech.com/show/6248/haswell-at-idf-2012-10w-is-the-new-17w

although I've heard that gains in the low double digits are possible.

 

[IntelUser2000]

I wouldn't rule out the on package DRAM, they might have not revealed yet. We still got two days left.

Another thing is if we don't see it at IDF it may be a late lifecycle thing.

 

[BenchPress]

Despite the FPU improvements this processor looks to be mostly perf-per-watt and GPU centric.

The "FPU improvements" are limited to the addition of FMA support, but Haswell adds way more than that. Integer vector opererations are widened from 128-bit to 256-bit. There's gather support, and other instructions to enable the eightfold parallel SPMD programming model. All of this is supported by twice the load/store and cache bandwidth.

Then there's the two pairs of scalar integer execution ports, which will increase Hyper-Threading performance during scalar integer workloads, but also avoids bottlenecks during vector workloads, and can even improve single-threaded IPC through a 'reverse' Hyper-Threading approach. And lets not forget TSX to make multi-threaded synchronization more efficient.

So it's a major improvement for all markets.

 

[pelov]

Well "are possible" doesn't mean a guaranteed 10%+ but rather anything ranging from 0-low teens. In fact, in the same sentence he states that we shouldn't expect any huge gains from Ivy-to-Haswell.

Don't expect any earth shattering increases in CPU performance over Ivy Bridge...

I'd consider 10%+ on the same node to be pretty substantial. With implementation of AVX2 we might see higher numbers but that too depends on vectorization and recompiling and its efficiency which is very rarely 100%. You pretty much have as much of a chance of winning the lottery as you do gaining ideal throughput from code.

Haswell looks amazing and I'm kicking myself for buying an X220 just over the weekend but I've learned a lesson from Bulldozer: Don't get your hopes up and wait for the product to be reviewed and benchmarked first

 

[Dribble]

Mmm, 10% ipc same node and still quad core is not very exciting. Looks like my old i5-2500K is going to stay competitive (well comfortably faster then any non-oc intel cpu) for another generation.

 

[pelov]

Mmm, 10% ipc same node and still quad core is not very exciting.

That's exactly what I'm getting at. It doesn't say "IPC" it says CPU performance which encompasses all of the little tweaks and changes to the architecture.

Anand should know quite well as to how it performs but because he's under NDA he can only give a ballpark figure and that figure wasn't substantial but that gains of 10% and slightly over are possible.

- People said much the same with the Ivy release. Some folks were claiming that Intel will have managed a 10-15% bump in IPC which would have represented a very substantial net gain in CPU performance when coupled with the increase in clock speeds which they knew beforehand. Intel was exactly on-point when they stated 10-15% gain overall yet people were still jumping the gun and overestimating. The "10% gains are possible" sounds exactly like the 10-15% in CPU improvement we had with Ivy going from Sandy. Intel and Anand both are usually spot-on with their estimates so there's no reason to assume this will be any different.

 

[BenchPress]

Mmm, 10% ipc same node and still quad core is not very exciting.

Haswell adds a fourth scalar execution port, and the vector throughput had doubled. So these cores are much more powerful.

I'm not entirely sure but I don't think Intel has made any official IPC claims yet... Architecturally it should be capable of more than 10%. And there's TSX to further improve mult-threading efficiency. Last but not least, the type of consumer software that would benefit from more cores, can more easily get more performance with AVX2. So there's really no need to go beyond quad-core just yet.

Look at it this way: When GPUs double their vector width, they advertise it as twice the number of 'compute' cores. Haswell does exactly that. So there's no need to be disappointed about a quad-core Haswell. It's going to be way better than a quad-core Sandy/Ivy Bridge.

 

[inf64]

The "FPU improvements" are limited to the addition of FMA support, but Haswell adds way more than that. Integer vector opererations are widened from 128-bit to 256-bit. There's gather support, and other instructions to enable the eightfold parallel SPMD programming model. All of this is supported by twice the load/store and cache bandwidth.

Then there's the two pairs of scalar integer execution ports, which will increase Hyper-Threading performance during scalar integer workloads, but also avoids bottlenecks during vector workloads, and can even improve single-threaded IPC through a 'reverse' Hyper-Threading approach. And lets not forget TSX to make multi-threaded synchronization more efficient.

So it's a major improvement for all markets.

The post was fine until the reverse HT point... I thought that myth was busted long time ago yet I see it comes back again and again. There is no such a thing and even if there was a hardware implementation of it in intel CPU it would require a recompile of the code and probably a minimal gains over traditional widening of the core(which intel sort of did with Haswell anyway). Let "reverse HT" myth die.

 

[ctsoth]

I'm most interested in the low power skus, as late next year I would like to build a jaguar or a haswell machine... Any increase in the intel iGPU is welcome, whether it be 10-50% it doesn't really matter to me, as any real gain is better for the consumer. Titles and tasks that are marginal now will rise to a suitable or good enough level of performance...

To be honest though, I am sort of an amd fanboy, as the first computer I ever built was an athlon xp 1800+, and so I hope the iGPU improvements are not so stellar on haswell, simply so amd can compete or have at least one competitive advantage...

 

[Ajay]

Mmm, 10% ipc same node and still quad core is not very exciting. Looks like my old i5-2500K is going to stay competitive (well comfortably faster then any non-oc intel cpu) for another generation.

"comfortably faster"? I'm guessing you didn't word that the way you meant. I think a 10+% increase in performance on the same node is pretty impressive.

In any case, Haswell isn't compelling for those that won't see much benefit for the work/play that's important to them if they already have SB/IB. But coming from Nehalem, as I am, that added 10% just makes Haswell all the more attractive.

I a bit torn between IB-E** (more cores) and Haswell when I start a new build next summer (Yay!). The software engineer in me would like to play with AVX2 and TSX (does TSX work on standard DDR3? I'm a little unclear about that). But I like to contribute to F@H in my father's memory, so more cores is usually the way to go, unless F@H is going to take advantage of AVX2. So, I'll need to wait for benchmarks and more info before deciding. Although I have to wait another year to upgrade, at least I will have some exciting high performance CPUs to choose from :thumbsup:




** I betting that IB-E will use a better TIM than IB, so it stands a good chance of being a better overclocker than IB.

 

[pelov]

** I betting that IB-E will use a better TIM than IB, so it stands a good chance of being a better overclocker than IB.

Process maturation alone would imply that the overclocks would be higher if not the stock clock speeds themselves and perhaps even both.

I think it's going to be interesting how they bin the desktop parts. Will they have the beefy graphics like the enthusiast chips now do? If so, we might even see stable clock speeds in order to not breach the TDP headroom. Big GT3 on-die graphics + lower TDP doesn't exactly make for an enthusiast's dream.

Err, actually, didn't Intel already release slides with what segment is getting what as far as the graphics goes? Would be quite nice if the desktop doesn't have GT3

 

[inf64]

8 core haswell will demolish 10 core IB-EX . But in order to get the haswell EX you need to wait quite a while (intel needs to launch and milk the IB-EX first).

 

[BenchPress]

The post was fine until the reverse HT point... I thought that myth was busted long time ago yet I see it comes back again and again. There is no such a thing and even if there was a hardware implementation of it in intel CPU it would require a recompile of the code and probably a minimal gains over traditional widening of the core(which intel sort of did with Haswell anyway). Let "reverse HT" myth die.

Please don't misinterpret it. In the wide sense the idea of 'reverse' Hyper-Threading is that a single thread could use the execution resources that are otherwise used by two threads.

Haswell appears to be a potential implementation of that. Ports 0+1 and ports 5+6 are practically identical for scalar integer operations, and thus you can run two threads in a Hyper-Threaded fashion, except that they don't have to compete over the same ports. However, when running a single thread, I believe it can use all four ports. An efficient implementation of this would have result forwarding between ports 0 and 1, and between ports 5 and 6, but not between those pairs (because a forwarding network between four arithmetic execution ports is not power efficient). It would also mean that a single thread would only make use the other pair of ports if that's not going to impede things (due to the lack of forwarding). So there would be some compromises, but I do believe it counts as reverse Hyper-Threading.

And no, this means it doesn't require any code recompilation. And no, Intel did not "traditionally" widen the core. The symmetry between ports 0+1 and 5+6 can't be a coincidence.

 

[BenchPress]

I a bit torn between IB-E** (more cores) and Haswell when I start a new build next summer (Yay!). The software engineer in me would like to play with AVX2 and TSX (does TSX work on standard DDR3? I'm a little unclear about that).

TSX doesn't have anything to do with RAM. It provides transactional synchronization between the L1 caches.

But I like to contribute to F@H in my father's memory, so more cores is usually the way to go, unless F@H is going to take advantage of AVX2.

Folding@home will absolutely use AVX2.

 

[Pilum]

Haswell appears to be a potential implementation of that. Ports 0+1 and ports 5+6 are practically identical for scalar integer operations, and thus you can run two threads in a Hyper-Threaded fashion, except that they don't have to compete over the same ports. However, when running a single thread, I believe it can use all four ports. An efficient implementation of this would have result forwarding between ports 0 and 1, and between ports 5 and 6, but not between those pairs (because a forwarding network between four arithmetic execution ports is not power efficient). It would also mean that a single thread would only make use the other pair of ports if that's not going to impede things (due to the lack of forwarding). So there would be some compromises, but I do believe it counts as reverse Hyper-Threading.

And no, this means it doesn't require any code recompilation. And no, Intel did not "traditionally" widen the core. The symmetry between ports 0+1 and 5+6 can't be a coincidence.

What symmetry? No integer MUL/DIV on p5+6. Also, limiting port forwarding to the p0+1 and p5+6 pairs would mean a regression in single-threaded performance vs. IVB. Unless Intels dev teams have been succesfully infiltrated by AMD moles, there's no chance of that IMO.