4770 vs 4770K?

[Galatian]

On a slightly different note: I think it is safe to say, that by the time TSX is fully adopted people will probably already purchase Skylake/Skymont. For right now, although I don't like the love from Intel, I don't think it will have any impact at all and if Haswell really overclocks much better the IVB then why not get the K series? Also I'm excited about IVB-E. any chance the will change out the TIM on that one?

 

[cytg111]

So negative

But yea, problary ...

 

[Pilum]

TSX only helps with active shared data threads. I doubt gaming uses that.

RTS games would need that for efficient multithreading. If you have bigger battles with hundreds or thousands of units, which can all interact with one another for pathfinding, movement or combat purposes, you'll have a lot of shared data which gets constantly modified.

 

[Pilum]

- Yea I know, was a different point I was trying to make, that parallelizing code that is seriel in nature will most likely need heavy synchronization(or data sharing).

Let me try to rephrase that: code, which so far needed to be serial in nature to achieve acceptable performance, may now turn out to be effectively parallelizable, due to the lower performance overhead of data synchronization when using TSX.

 

[Idontcare]

I guess his point was that, while AMD does tier by price, you generally get a better product (more cores, more MHz, etc.) for the increased price tag.

It's a wash with Intel - we get a product that is both superior (unlocked multi), yet inferior (gimped features) at the same time, like a hot chick with a weird laugh

True. What is weird about Intel is not that they tier-out their features, both Intel and AMD do that, but as you are rightly noting Intel fails to have the upper tier components where nothing is intentionally gimped or held back.

Take the 4770k, fine with me that it exists with its reduced feature set over that of the 4770 and mobile variants, but why not then have a 4780k that is priced say $30 higher still but which has everything under the sun fully enabled?

The "kitchen sink" SKU for those customers who do want everything, including the kitchen sink, in their mainstream processor (and are willing to pay extra for it).

 

[ShintaiDK]

I think they simply worry that a full LGA11xx K model would diminish the LGA20xx K/X further.

Unless its something to do with stability/functionality of the involved features when overclocked.

 

[sefsefsefsef]

TSX only helps with active shared data threads. I doubt gaming uses that.

Also TSX is divided into 2 parts HLE and RTM. HLE is backwards compatible with non TSX CPUs, but slower. RTM the opposite.

Shared data between threads is the only (fundamental) reason why any code (that has a sufficient amount of data to operate on) doesn't scale to many cores. Including games. Especially games.

Also, HLE can improve the performance of a single thread of execution that is attempting to acquire an uncontested lock (including locks in the OS, which are still going to be encountered in entirely single-threaded applications). Parroting marketing info will only get you so far.

 

[sefsefsefsef]

I guess his point was that, while AMD does tier by price, you generally get a better product (more cores, more MHz, etc.) for the increased price tag.

It's a wash with Intel - we get a product that is both superior (unlocked multi), yet inferior (gimped features) at the same time, like a hot chick with a weird laugh

Another important point is that the exact same codepaths would execute on X3s as on X4s, because they had identical ISAs. AMD doesn't (that I can remember recently, if ever) cripple the ISA for the sake of creating more SKUs. That is unfortunately not the case with the market segmentation that Intel is currently going for. Some code that runs great on a 4770 using TSX might run like crap (as in like <50% the performance) on a 4770K.

 

[Idontcare]

Another important point is that the exact same codepaths would execute on X3s as on X4s, because they had identical ISAs. AMD doesn't (that I can remember recently, if ever) cripple the ISA for the sake of creating more SKUs. That is unfortunately not the case with the market segmentation that Intel is currently going for. Some code that runs great on a 4770 using TSX might run like crap (as in like <50% the performance) on a 4770K.

Still two sides of the same coin.

Whether you are crippling performance by way of outright crippling the core-count on the die or by crippling the ISA, either way you are intentionally crippling performance to create a price-based tiered product portfolio.

Just because we can delineate what has been crippled and where doesn't make one company's approach any more superior to the others.

AMD tells you if you want full performance, if you want all those cores to be enabled and running at 4GHz so you get max performance then you got to pay for it. Intel tells you the same thing.

To debate it like the two aren't cut from the same cloth is just splitting hairs IMO. The MBA's at AMD graduated from the same business schools as the MBA's at Intel.

 

[cytg111]

The "kitchen sink" SKU for those customers who do want everything, including the kitchen sink, in their mainstream processor (and are willing to pay extra for it).

Hear hear!! .. Wtf is up with that ..

 

[cytg111]

Let me try to rephrase that: code, which so far needed to be serial in nature to achieve acceptable performance, may now turn out to be effectively parallelizable, due to the lower performance overhead of data synchronization when using TSX.

- Okay .. semantics, we are relatively speaking on the same 'page' (hohoho)

 

[cytg111]

Another important point is that the exact same codepaths would execute on X3s as on X4s, because they had identical ISAs. AMD doesn't (that I can remember recently, if ever) cripple the ISA for the sake of creating more SKUs. That is unfortunately not the case with the market segmentation that Intel is currently going for. Some code that runs great on a 4770 using TSX might run like crap (as in like <50% the performance) on a 4770K.

50% .. Personally I would not feel confident about putting that number out as a guesstimate, but until reviews reviews reviews, it is anyones guess I suppose.

.. You ARE estimating that TSX can potentially provide a 50%+ performance boost right? (on what, a few hundred cores?)

 

[24601]

True. What is weird about Intel is not that they tier-out their features, both Intel and AMD do that, but as you are rightly noting Intel fails to have the upper tier components where nothing is intentionally gimped or held back.

Take the 4770k, fine with me that it exists with its reduced feature set over that of the 4770 and mobile variants, but why not then have a 4780k that is priced say $30 higher still but which has everything under the sun fully enabled?

The "kitchen sink" SKU for those customers who do want everything, including the kitchen sink, in their mainstream processor (and are willing to pay extra for it).

As you have alluded to already, they'd rather have people pay the extreme premium of a xeon or other lga2011 chip for those features, as 4.4-5.0 ghz 4770k would definitely step on a few of those chip's toes as far as performance goes otherwise.

This is the same reason for the crap TIM on the IB desktop chips. It allows them to give artificially larger reasons for people to buy Haswell as well as SB-E as well as be able to unload their old portfolio of SB desktop chips at the same price.

It is market segmentation / anti-cannibalization genius at work.

 

[sefsefsefsef]

50% .. Personally I would not feel confident about putting that number out as a guesstimate, but until reviews reviews reviews, it is anyones guess I suppose.

.. You ARE estimating that TSX can potentially provide a 50%+ performance boost right? (on what, a few hundred cores?)

It would be pretty easy to write a multi-threaded program where the TSX version had more than double the performance of a coarse-grained lock version of the same program (especially if you have more and more threads, like you mentioned; but really you wouldn't need more than a handful of threads to see this behavior, depending on how you wrote the code). It would probably be uncommon to find this happening in commercial software, but for hacking away at home it would be extremely easy to do this if you aren't an expert a writing multi-threaded code. That's the whole point of Transactional Memory--to make the programming model more intuitive and still get tons of performance out of it, and I look forward to a time when it's ubiquitous.

 

[Phynaz]

This. Even when AMD had the performance crown (early mid K7 days) they were still very enthusiast friendly.

"It drives me nuts when I read on the web that people are overclocking at 1, sometimes 2 bins"

- AMD CTO Atiq Raza to Maximum PC magazine.

Never get the impression that any company is your friend.

 

[2is]

Even without Bclk overclocking, I might prefer the 4770 non-K. If it can overclock 4 bins like current non-K chips it should be able to get within 10% of where I would clock a 4770k anyways (I try not to raise voltage when OCing).

I wonder on the K series chips how many overclockers will blow out the on-package VRMs. I would bet that the VRMs are going to be more similar to a 4 or 6 phase setup than an 8 or 12 phase setup.

I'm thinking the same thing, though I'd still wait for reviews to determine exactly what those features do and if they'd be useful for me, in addition to seeing how well the K series can OC.