NAND is made with transistors at a certain size. 20nm or less is typical. Smaller production nodes (smaller transistors) means more NAND in the same space, more NAND per wafer, higher capacity drives, etc., but it also means shorter lifespan, and often translates to lower performance. Smaller node sizes are also usually more expensive to fabricate.
3D NAND (or VNAND) is built at a larger production node (40 or 45nm, I forget which) and then essentially stacked on top of itself. So you get as much or more MB of storage from the same size package, without the disadvantages of the higher-density process. It's just taller. And probably generates more heat or something - there's always a drawback.
This has nothing to do with SLC, MLC, or TLC, which refers to the the number of bits stored in each cell, and is independent of the node size. (TLC stores more data in the same amount of NAND, but is more error-prone and slower as a result.) In particular, TLC NAND made on the smaller node sizes suffers from a significant performance and endurance (write cycles) drop, which TLC VNAND alleviates.
It also allows Samsung to keep building profitable products on older, less expensive process nodes.
Important reading:
http://www.anandtech.com/show/7237/samsungs-vnand-hitting-the-reset-button-on-nand-scaling
http://www.anandtech.com/show/5067/understanding-tlc-nand/
Intel and Micron have teamed up to introduce their own VNAND tech, but I don't know if it's in any shipping products yet. It beats the pants off of trying to charge less and less money for increasingly error-prone NAND made on increasingly small and correspondingly expensive process nodes.
In other words, SLC VNAND would be the shiznit.