Recent content by dacostafilipe

Just watched the latest video from STH and had to think about this thread Somehow he went over multiple points discussed here, is he reading us? :D

You talk about optimisation, I'm talking about default behaviour. 🤷‍♂️

That's my point, it should know given enough time/cycles.

Idk, but I would expect a modern scheduler to detect software behavior and adapt his strategy based on that. Or at least let executable select some "modes" to run on. GameMode was a possible solution, but do people really use it?

Streaming. Navi 48 (9070XT) already has two VCN.

So, we are still not certain why it would cost them a ton of money. Yeah, typo. Should have been 18A :P

How can you be so certain that the cancelation was not impacted by yields? It could be that yield did not increase fast enough on 20A and/or were at the same level as 1618A and it made financial sense to scrap it.

Don't confuse LLM and ML. It's possible to use one without the other ...

Well, if the connection between IOD and CCD is changed from serdes to fan-out, it could on its own bring decent performance improvements, specially in terms of latency and power redistribution.

In that case I would look closer at the CPU as a selection criterium.

He's right, it's the interconnect. Source: https://chipsandcheese.com/p/amds-strix-halo-under-the-hood

It could be both, you know ...

Optimisation. If you read the "RDNA 4’s Raytracing Improvements" article above you will see that AMD tries to find "tricks" to improve RT performance, but those have different impacts depending on the game. If the game-dev can themself select how the RT is handled, it could improve performance...

Then why would TSMC move to an unproven/untested node instead of using their own? Moving to a TSMC node if the only way a company like AMD or Nvidia would be interested in investing here.

Sounds more like the other way around if you ask me.