- Mar 3, 2017
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To just point out the most glaring of many inaccuracies here, 6% better perf/watt means ~6% lower power at iso-frequency, not 15%. Fabs would call the other metric performance. But if I have to once again repeat common knowledge, I think this conversation no longer has value.
That s 6% better perf (not perf/watt) from N4 to N4P wich mean 6% higher frequency at same power, and since TSMC s process scale at P = F^2.6 slope it means that at same frequency power is 1/1.06^2.6, that is 0.86x the power.
From N5 to N4P, since Zen 4 use the former, perf is 11% better at same power, this means that at same frequency power is 1/1.11^2.6 = 0.76x.
The only accuracies are from the one that do understand jack to semiconductors physics, i understand better why you thought that Zen 5 wouldnt perform much better...
Where did you get the information for the exponential function of TSMC's process scaling? Have they actually made that public or are you relying on reverse engineering other data?
If you look at just AMD's statements on the matter, and ignore the internet commentary, they've said nothing bad about hybrid. Around ADL's launch, they basically just said they would wait till the software ecosystem had adapted. I think it's pretty likely that they will eventually do an 8+16 flagship SKU. The biggest problem is that their small core development is serialized behind the big core, and the desktop chips are the first things they launch on a new arch. They will need to shift to doing those in parallel, but iirc, there were already some rumors along those lines.With AMD essentially stating that they aren't chasing Intel's strategy of shoveling small cores into a processor
AMD didn't say that they won't add small cores. They said that they will not mix cores that need software to run differently on each core. Papermaster also said that the reason they are not going over 16 cores is because the memory can't keep up in a dual-channel format.
Just FYI, MLID showed some road map where Turin Dense came ahead of regular Turin.If you look at just AMD's statements on the matter, and ignore the internet commentary, they've said nothing bad about hybrid. Around ADL's launch, they basically just said they would wait till the software ecosystem had adapted. I think it's pretty likely that they will eventually do an 8+16 flagship SKU. The biggest problem is that their small core development is serialized behind the big core, and the desktop chips are the first things they launch on a new arch. They will need to shift to doing those in parallel, but iirc, there were already some rumors along those lines.
AMD didn't say that they won't add small cores. They said that they will not mix cores that need software to run differently on each core. Papermaster also said that the reason they are not going over 16 cores is because the memory can't keep up in a dual-channel format.
Considering where things stand:I don’t buy that argument about memory bandwidth at all.
Motherboard OEMs are beginning to roll out test BIOS versions with a new AGESA that supports the fastest DDR5 speeds out there. In addition, memory speeds are already significantly faster than what DDR4 is capable of. Intel also has no issues with higher core counts. Finally, who cares if some workloads are limited by bandwidth? The hypothetical 8+16 chip will still be faster.
They could also solve things by moving to a quad channel setup for high end enthusiast offerings.
If they dropped a quad channel board and a 24c CPU that beats up the 7950X many of us would buy it in a heartbeat.
Why wouldn't anyone at AMD see an opportunity in that? Enthusiasts already pay quite a bit for the AM5 flagship CPU/mobo combo so they may not mind paying a bit more for a higher end chipset with quad channel RAM. AMD can keep 6,8 and 12 channel RAM for workstation and servers.The chances of AMD releasing 4 memory channel socket are near zero.
It would be a large platform investment for a very small volume. Socket and mobo pricing is extremely sensitive to volume. And of course, you'd need a 4ch die...Why wouldn't anyone at AMD see an opportunity in that? Enthusiasts already pay quite a bit for the AM5 flagship CPU/mobo combo so they may not mind paying a bit more for a higher end chipset with quad channel RAM. AMD can keep 6,8 and 12 channel RAM for workstation and servers.
Volume could increase depending on how tangible the gains are.It would be a large platform investment for a very small volume.
In their infinite wisdom, AMD marketing determined that "premium" mother board needs 28 USB ports rather than 4 memory channels.Why wouldn't anyone at AMD see an opportunity in that? Enthusiasts already pay quite a bit for the AM5 flagship CPU/mobo combo so they may not mind paying a bit more for a higher end chipset with quad channel RAM. AMD can keep 6,8 and 12 channel RAM for workstation and servers.
In their infinite wisdom, AMD marketing determined that "premium" mother board needs 28 USB ports rather than 4 memory channels.
Well if that is the cadence they hold to, it would not be surprising to see an 8+16 SKU as soon as that roadmap aligns. I think that's likely to become AMD's standard high end offering moving forward.It is not clear how it translates to desktop release schedule, but it seems that the dense CCD is not going to be lagging behind regular CCDs by very long.
It's sandwiched between the volumes of mainstream (2ch) client and lower end server (Sienna, 6ch). That's a very narrow product range.Volume could increase depending on how tangible the gains are.
Well if that is the cadence they hold to, it would not be surprising to see an 8+16 SKU as soon as that roadmap aligns. I think that's likely to become AMD's standard high end offering moving forward.
Yeah, I think that's where their vision is heading. Just need to fix most of the clock speed regression with v-cache, and then there really wouldn't be any downside vs 8+8.8 core CCD with V-cache + 16 core CCD without could be a possible top end SKU.
It seems AMD needs to overcome the challenges of dissipating the heat from the CPU better. In general CCDs and even more in CCDs with V-Cache.Yeah, I think that's where their vision is heading. Just need to fix most of the clock speed regression with v-cache, and then there really wouldn't be any downside vs 8+8.
To be clear, the cost to implement 28 USB ports is minimal compared to the cost of implementing 4 memory channels with DIMMs.In their infinite wisdom, AMD marketing determined that "premium" mother board needs 28 USB ports rather than 4 memory channels.
mlid needs to touch some grass.Just FYI, MLID showed some road map where Turin Dense came ahead of regular Turin.
It is not clear how it translates to desktop release schedule, but it seems that the dense CCD is not going to be lagging behind regular CCDs by very long.
May be something on am6 with zen 6.It would be a large platform investment for a very small volume. Socket and mobo pricing is extremely sensitive to volume. And of course, you'd need a 4ch die...
They'll figure it out eventually. Thermal density is definitely a big problem, especially on newer nodes, but that's the kind of raw engineering problem that engineers love. Maybe they'll flip the stacking or something else, but I doubt V-cache will always come with such a penalty.It seems AMD needs to overcome the challenges of dissipating the heat from the CPU better. In general CCDs and even more in CCDs with V-Cache.
Eh, he kinda sidesteps it a little. And the raw technical merit of such a product is very clear. It's not going to happen for the Zen 4 gen, but Zen 5, Zen 6? I think that interview will not age particularly well, and is more targeted in the "selling the products we have today" sense.Not according to a recent TPU interview with David McAfee
