Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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I don't think that works. How does that work with binning strategy? How many chips need to be binned down to 4 cores?
It could work if they at least create some new 9905X SKU with dissimilar CCDs and look at the sales data after a year to find out what consumers prefer. This is now the 3rd generation where x900X SKU seems to be disliked and always has to be gotten rid of through firesales. They should just stop with this stupid SKU.

They also have the option of creating 9930X or something like that with one 8 core CCD and one 6 core CCD inbetween 9900X and 9950X for 28 threads and I bet it would sell better than 9900X.
 
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MS_AT

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Jul 15, 2024
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It may help because most games won't go above 16 threads which will ensure no thread needs to go outside the 8 core CCD. On 6 core CCD, the number of threads prove insufficient and some game/gpu driver threads need to be moved to the other CCD.

Like look here: https://www.techspot.com/review/2811-cpu-cache-vs-cores/
That depends on nature of communication, what you advocate would help if the threads are talking to each other heavily, but if they are just workers spawned to do something and die then CCD2CCD overhead doesn't matter that much and 6C x 6C could be better due to more balanced nature [same amount of LLC per core, where 8x4 would require more complex scheduling logic to extract max performance]. After all there are some gaming benchmarks were 7900x is leading 7700x.
 

Josh128

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Oct 14, 2022
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"And that fabric and IOD, seems they stopped working on it because that one single guy went on paternity leave."

lol what is this about? That sound like complete BS.
 
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CakeMonster

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Nov 22, 2012
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I remember when Zen3 launched there was speculation that 5900X might perform better in some workloads than 5950X because it would have more cache per thread. I don't think that proved to be true, but theoretically I can understand how you could imagine that.
 

B-Riz

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Feb 15, 2011
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I remember when Zen3 launched there was speculation that 5900X might perform better in some workloads than 5950X because it would have more cache per thread. I don't think that proved to be true, but theoretically I can understand how you could imagine that.

5950X would always perform better; it gets a top binned primary 8 core then a mid tier 8 core.

5900X was a mid tier 6 core and a lower tier 6 core.

5900 was a sleeper good chip, it was binned for low power performance, but opened up when given more power to work with.
 

StefanR5R

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Dec 10, 2016
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It may help because most games won't go above 16 threads which will ensure no thread needs to go outside the 8 core CCD.
And who assigns CPU affinities to the game threads to ensure that they don't wander off to another cache domain?

This test was done without locking the core clocks.

Edit,
That depends on nature of communication, what you advocate would help if the threads are talking to each other heavily, but if they are just workers spawned to do something and die then CCD2CCD overhead doesn't matter that much and 6C x 6C could be better due to more balanced nature [same amount of LLC per core, where 8x4 would require more complex scheduling logic to extract max performance]. After all there are some gaming benchmarks were 7900x is leading 7700x.
Incidentally, the Linux kernel's process scheduler ignores last level cache domains in its scheduling decisions for threads of the same process. This is in contrast to NUMA nodes, for which the kernel implements the default policy to try and keep all threads of a process on the same node. I don't know why such a policy is not applied WRT cache domains, but I suspect it is because the optimum for performance cannot be predicted by the kernel. I don't know what Windows' process scheduler does in this regard.
 
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inquiss

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Oct 13, 2010
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It may help because most games won't go above 16 threads which will ensure no thread needs to go outside the 8 core CCD. On 6 core CCD, the number of threads prove insufficient and some game/gpu driver threads need to be moved to the other CCD.

Like look here: https://www.techspot.com/review/2811-cpu-cache-vs-cores/

View attachment 104907
Not sure what you're saying here. Yes some games require more threads than 6, but how does that help when windows will put threads on both CCDs. You still get cross talk in 8+4, plus that doesn't address the point around binning. It doesn't make commercial sense, which is backed up by the fact we haven't seen this config.
 

inquiss

Senior member
Oct 13, 2010
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It could work if they at least create some new 9905X SKU with dissimilar CCDs and look at the sales data after a year to find out what consumers prefer. This is now the 3rd generation where x900X SKU seems to be disliked and always has to be gotten rid of through firesales. They should just stop with this stupid SKU.

They also have the option of creating 9930X or something like that with one 8 core CCD and one 6 core CCD inbetween 9900X and 9950X for 28 threads and I bet it would sell better than 9900X.
12 core CPU's don't sell well, agreed. More cores is such a niche anyway. AMD has a killer product with 8 cores and cache. If you're into games you buy that. If you really want more cores on a consumer platform then 16c is the way to go. 12c is sort of unloved for good reason. It isn't core maxing, it isn't gaming maxing. An esoteric config within the 12c space, that costs money to assemble and explain to people doesn't make business sense, and we haven't seen AMD do it for precisely that reason.
 

CouncilorIrissa

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Jul 28, 2023
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Is lacking love of Strix Halo here. No one understand how much this SoC is important to the whole computer market.
3N with RX 6750 XT performance.
Gpus becoming part of the CPU is future and m1 ultra is here to prove how much is possible to do an Ultimate APU.
Zero attention for the STXH tablet/notebook console that Lenovo is doing.
Plenty of people are interested in STXH, it's just that we're far away from its release. The hot topic is Granite Ridge dumpster fire.

I am very interested in learning how much Zen 5 is held back (if at all) by the antiquated uncore that should be fixed with the Halo.
 

inquiss

Senior member
Oct 13, 2010
200
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Is lacking love of Strix Halo here. No one understand how much this SoC is important to the whole computer market.
3N with RX 6750 XT performance.
Gpus becoming part of the CPU is future and m1 ultra is here to prove how much is possible to do an Ultimate APU.
Zero attention for the STXH tablet/notebook console that Lenovo is doing.
Strix Halo I really want to be successful. This is what AMD can do when the naysayers in OEMs stop holding them back from doing something truly fun. Combining RAM between CPU and GPU makes so much sense.
 

StinkyPinky

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Jul 6, 2002
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12 core CPU's don't sell well, agreed. More cores is such a niche anyway. AMD has a killer product with 8 cores and cache. If you're into games you buy that. If you really want more cores on a consumer platform then 16c is the way to go. 12c is sort of unloved for good reason. It isn't core maxing, it isn't gaming maxing. An esoteric config that costs money to assemble and explain to people doesn't make business sense, and we haven't seen AMD do it for precisely that reason.

I feel personally attacked
 

MS_AT

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Jul 15, 2024
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And who assigns CPU affinities to the game threads to ensure that they don't wander off to another cache domain?
I would assume game developer as they best know the nature of their own workload. Look up Cyberpunk settings for CPU, they have very basic option for this exposed to the user. Generally there are windows api that let you outright pin workloads to specific cores [though they are generally not recommended as you might shoot yourself in the foot] or to suggest to the kernel it should keep specific threads together on specific sets of cores. It's even mentioned in publicly available resources from AMD, but I don't have them at hand and can't look them up right now.
 

Hitman928

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Apr 15, 2012
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del42sa

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May 28, 2013
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Looking over the variance in some of the reviews, I would surmise the lower TDP (65W) is hurting some results more than others.
Why? Because it looks like some boards are putting unnecessarily high voltage on some rails (e.g. vSOC 1.25V+) which would subtract that much more power budget from the cores.

Your uncore is a decent percentage of 65W (88W PPT) while at higher power budgets the percentage becomes less significant. Seeing 9600X hit higher clocks both ST and MT versus 9700X shows the lower power budget is really hurting Zen 5 reviews and crimping scores (esp 9700X). Or leaving a lot more OC headroom (20%+ in some cases!) depending on your perspective.

I expect to see this clarified a bit next week when we see what Zen 5 will do out of the box for the higher TDP parts, especially the 9950X.
You never get a second chance to make a good first impression ....
 
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B-Riz

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Feb 15, 2011
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I would assume game developer as they best know the nature of their own workload. Look up Cyberpunk settings for CPU, they have very basic option for this exposed to the user. Generally there are windows api that let you outright pin workloads to specific cores [though they are generally not recommended as you might shoot yourself in the foot] or to suggest to the kernel it should keep specific threads together on specific sets of cores. It's even mentioned in publicly available resources from AMD, but I don't have them at hand and can't look them up right now.

Process Lasso is the utility for us 12 / 16 core and more Ryzen and ThreadRipper users; I have clear benefits pinning jank UE4 games to CPU0-CPU11 in it, and it is a known thing to do here on this forum...
 

MS_AT

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Jul 15, 2024
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Process Lasso is the utility for us 12 / 16 core and more Ryzen and ThreadRipper users; I have clear benefits pinning jank UE4 games to CPU0-CPU11 in it, and it is a known thing to do here on this forum...
This is an alternative for users aware that Process Lasso exist, and those that are aware what a process even is;) I guess this is minority of the people playing games on PC;) That's why 7950x3d was getting so many complains for, that end users did not want this complexity.
 
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