Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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inquiss

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Oct 13, 2010
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I am using DDR4 3200 with 5950X, so DDR5 6400 should be enough for 24 cores if not 32 Zen 5 cores. Remember L2 was increased in Zen4, so it will relieve some of the memory pressure. Sure more memory bandwidth will help, but what matters is whether 24/32 cores will out perform 16 cores in multi threaded applications. If even with limited bandwidth, a 24 core Zen5 beats 16 Zen5 within same power/bandwidth envelope, it is a win for the user.
It would be a pointless product that nobody would buy. Partly because no one buys the 16 core chips anyway, but additionally because they would be severely bandwidth constrained. If you've read this thread you can see that the current chips seem bandwidth constrained as they are already.
 

inquiss

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Oct 13, 2010
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You know you dont have to buy hypothetical 24 core product, if you feel its too constrained by memory bandwith, right?
I wouldn't, and I'm not going to because AMD isn't releasing it.hiw many people are going to be interested in an underperforming 24 or 32 core chips that's so memory contained? Either you want the chip to work (get epyc or thread ripper) or you don't. Not many people are in the "I want to buy a high core count processor and would buy it even if it's memory starved" camp.
 

Timmah!

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Jul 24, 2010
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I wouldn't, and I'm not going to because AMD isn't releasing it.hiw many people are going to be interested in an underperforming 24 or 32 core chips that's so memory contained? Either you want the chip to work (get epyc or thread ripper) or you don't. Not many people are in the "I want to buy a high core count processor and would buy it even if it's memory starved" camp.
Arent you constrained by memory bandwith only when you saturate entire available memory?
 

Timmah!

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Jul 24, 2010
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No? You're memory bandwidth constrained when you can't get things out of the memory fast enough.
Allright then. There are still tasks, like 3D rendering, that does not benefit from faster RAM significantly, that would immensely benefit from additionaĺ cores. RAM speed perhaps becomes important factor when you run out of it and data needs to be fetched from drive, but thats better to be resolved by more RAM anyway.
 

CakeMonster

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Nov 22, 2012
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Back during Z3 I was all aboard the MOAR CORES train, as it seemed even games were rapidly using 50% of threads, suggesting maxing the main cores and reaching into SMT. But the later generations have proved that better cores do make up for a lot of those scenarios, I think we'll be perfectly fine with 16c/32t for the duration of Z6 (up to 44~48 months from now). However, if Z6 release slips, or it does not improve much IPC wise, I could turn out to be wrong. I'm much more worried about the IPC race and cache now after initial Z5 results, like hopefully we'll get 12c and 16c X3D models without the heterogenous cores and the mess that is thread prioritization of those now.
 
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inquiss

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Oct 13, 2010
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Allright then. There are still tasks, like 3D rendering, that does not benefit from faster RAM significantly, that would immensely benefit from additionaĺ cores. RAM speed perhaps becomes important factor when you run out of it and data needs to be fetched from drive, but thats better to be resolved by more RAM anyway.
I dont mean any disrespect by this, you need to read about the difference between memory capacity and memory bandwidth.

Ram speed becomes an important factor when you need the bandwidth. It's independent from memory capacity. The third sentence suggests you don't know the difference.

If you want to do things with lots of cores. AMD has a product for you. If you're a hobbyist that wants more than 16 cores but no commercial output to pay for it, tough luck. You can't have it without more bandwidth, the more bandwidth version is called threadripper.
 

IEC

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Jun 10, 2004
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Looking over the variance in some of the reviews, I would surmise the lower TDP (65W) is hurting some results more than others.
Why? Because it looks like some boards are putting unnecessarily high voltage on some rails (e.g. vSOC 1.25V+) which would subtract that much more power budget from the cores.

Your uncore is a decent percentage of 65W (88W PPT) while at higher power budgets the percentage becomes less significant. Seeing 9600X hit higher clocks both ST and MT versus 9700X shows the lower power budget is really hurting Zen 5 reviews and crimping scores (esp 9700X). Or leaving a lot more OC headroom (20%+ in some cases!) depending on your perspective.

I expect to see this clarified a bit next week when we see what Zen 5 will do out of the box for the higher TDP parts, especially the 9950X.
 

inquiss

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Oct 13, 2010
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Looking over the variance in some of the reviews, I would surmise the lower TDP (65W) is hurting some results more than others.
Why? Because it looks like some boards are putting unnecessarily high voltage on some rails (e.g. vSOC 1.25V+) which would subtract that much more power budget from the cores.

Your uncore is a decent percentage of 65W (88W PPT) while at higher power budgets the percentage becomes less significant. Seeing 9600X hit higher clocks both ST and MT versus 9700X shows the lower power budget is really hurting Zen 5 reviews and crimping scores (esp 9700X). Or leaving a lot more OC headroom (20%+ in some cases!) depending on your perspective.

I expect to see this clarified a bit next week when we see what Zen 5 will do out of the box for the higher TDP parts, especially the 9950X.
Yes, keen to see the less power constrained reviews and wondering if there is a significant difference in binning. Could be a gen where AMD has lower costs per chip but a higher average cost of unit sold because the higher core count CPUs are less constrained overall.

As usual, if you want gaming get the X3D version, or maybe get the higher core counts that stretch their legs more.
 
Jul 27, 2020
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Ram speed becomes an important factor when you need the bandwidth. It's independent from memory capacity. The third sentence suggests you don't know the difference.
I think he means to say that RAM speed is meaningless when the required data cannot be found in RAM. That's when the perceptible delay is felt. If more RAM allows more data to be held in RAM and prevents going to disk, then in that case, it's better to have more RAM than speedier RAM. This obviously is for limited cases where the application preloads the entire working set into RAM and then works on that exclusively, without needing to go to disk until the task is finished. He does have a point that speedier RAM may not help in limited RAM capacity scenarios.
 

Mahboi

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Apr 4, 2024
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Possibly moronic question but does Zen 5 qualify as an architecture or a micro-architecture?
There's enough changes in the frontend (and the back too to be fair) to completely change the performance expectations vis à vis the Zen 1 -> Zen 4 era.
It's just semantics but I'm not even sure if it qualifies as "reworking an arch" or "is a new arch" entirely. It feels very new to me.
 

JustViewing

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Aug 17, 2022
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Seeing 9600X hit higher clocks both ST and MT versus 9700X shows the lower power budget is really hurting Zen 5 reviews and crimping scores (esp 9700X). Or leaving a lot more OC headroom (20%+ in some cases!) depending on your perspective.
That is how sane TDP should look like. This could reduce cost of motherboards. People who wants to overclock are free to buy expensive motherboards.
 

Thunder 57

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Aug 19, 2007
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The chiplet crap and higher RAM latency will nullify any compute advantage it has.

Certainly won't help. As long as uses sane amounts of power compared to RPL and doesn't fail that alone would be nice. It may also look better if the new microcode reduces RPL performance.

In 2027? worth the work? What if Intel doesn't want to lose more to AMD in performance and give IPC gains generation/year after generation.


BTW, i know some secret about the performance of Zen5 and Zen6.

Not buying it or anyone who claims that at this point.
 
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JustViewing

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Aug 17, 2022
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It would be a pointless product that nobody would buy. Partly because no one buys the 16 core chips anyway, but additionally because they would be severely bandwidth constrained. If you've read this thread you can see that the current chips seem bandwidth constrained as they are already.
Not all applications need highest bandwidth. That is why cache is there. Remember, each CCD will get its own L3. Even bandwidth limited multicore performance will be higher than 16 core parts.
 
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JustViewing

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Aug 17, 2022
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I dont mean any disrespect by this, you need to read about the difference between memory capacity and memory bandwidth.

Ram speed becomes an important factor when you need the bandwidth. It's independent from memory capacity. The third sentence suggests you don't know the difference.

If you want to do things with lots of cores. AMD has a product for you. If you're a hobbyist that wants more than 16 cores but no commercial output to pay for it, tough luck. You can't have it without more bandwidth, the more bandwidth version is called threadripper.
It is easy to test if you are bandwidth limited. In best case, DDR5 can be read at 100GB/s. Say for simplicity 70GB/s. So for this to become bottleneck, your processing activity needs to be faster than this. For example, the application should be capable of encoding video at higher rate than this. Otherwise memory will not be a bottleneck for encoding. Same for other similar applications.
 
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Det0x

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Sep 11, 2014
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If DDR4 is enough for 16 cores, I am sure DDR5 with double the bandwidth enough for 32 cores. At least should be enough for 24 cores.
Lets now compare the bandwidth that's available for a single CCD

Single CCD Zen3: @ 2000mhz FCLK and 4000MT/s 1:1
1723145174401.png


Single CCD Zen5 @ 2200mhz FCLK + 6600MT/s 1:1
1723144465130.png

Single CCD Zen5 @ 2200mhz FCLK + 8000MT/s 2:1
1723144539881.png

Now tell me, do you still think its the memoryspeed itself that's the limiting factor here ?

*edit*
updated with a other zen3 screenshot
 
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JustViewing

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Aug 17, 2022
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Lets now compare the bandwidth that's available for a single CCD

Single CCD Zen3: @ 1900mhz FCLK and 3800MT/s supersuper tight memory timings (this is pretty BIS with unstable OC)
View attachment 104834


Single CCD Zen5 @ 2200mhz FCLK + 6600MT/s
View attachment 104832

Single CCD Zen5 @ 2200mhz FCLK + 8000MT/s
View attachment 104833

Now tell me, do you still think its the memoryspeed itself that's the limiting factor here ?
For memory to become bottleneck, you need to process data faster than that. Most multi threaded tasks work less than this rate. Maybe apps like 7zip decode, it maybe a bottleneck.
 

HurleyBird

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Apr 22, 2003
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When you have 50 or more individual benchmarks with bizarre performance profiles that don't match anything you do irl, it taints the geomean. Phoronix has been like this for years.

That's not how it works. A sufficiently large sample size of "bizarre" performers is more robust than a very small sample size of "looks about right" performers.
 
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GTracing

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Aug 6, 2021
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Possibly moronic question but does Zen 5 qualify as an architecture or a micro-architecture?
There's enough changes in the frontend (and the back too to be fair) to completely change the performance expectations vis à vis the Zen 1 -> Zen 4 era.
It's just semantics but I'm not even sure if it qualifies as "reworking an arch" or "is a new arch" entirely. It feels very new to me.
It's really just semantics. Every CPU carries over some design elements from previous generation. Even Zen used elements Carizzo, but I will say that Zen5 seems to be the biggest change to Zen yet. https://www.anandtech.com/show/1117...-review-a-deep-dive-on-1800x-1700x-and-1700/6

For the power, AMD has taken what it learned with Carrizo and moved it forward. This involves more aggressive monitoring of critical paths around the core, and better control of the frequency and power in various regions of the silicon.

"architecture" is really vague and means different things to different people. It can refer to Von Neumann architecture, the ISA, the ISA with instruction extensions, the microarchitecture family (e.g. Zen), the microarchitecture iteration (e.g. Zen3), or even the "architecture" of the whole computer system. I try to avoid using the term altogether.
 

dr1337

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May 25, 2020
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spiderman-rt-1920-1080.png


It really bothers me that the 9600x is almost 10fps faster than the 9700x in this bench by TPU. Even at different resolutions spiderman RT has an odd effect on the current Zen 5 CPUs. But also, for some reason this seems to be the only condition they tested that has this anomaly.


I think there is either a major bottleneck in the architecture somewhere or the firmware/bios/AGESA isn't working at 100%.
 
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Nothingness

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Jul 3, 2013
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Possibly moronic question but does Zen 5 qualify as an architecture or a micro-architecture?
In general architecture is used for the instruction description (along with some system aspects) while microarchitecture is how an architecture is implemented by a CPU.

Arm, IA-32, Intel 64/x86-64 are architectures for instance.
Both Zen 4 and Zen 5 microarchitectures implement the x86-64 architecture.
 

DisEnchantment

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Mar 3, 2017
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It really bothers me that the 9600x is almost 10fps faster than the 9700x in this bench by TPU. Even at different resolutions spiderman RT has an odd effect on the current Zen 5 CPUs. But also, for some reason this seems to be the only condition they tested that has this anomaly.
Could be issues with how L3 cache is getting sliced up with more L2 connected to it.