Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Mopetar]

adroc_thurston and the order of 32% amirite?

I'll show myself out.

If he doesn't ask the mods to change his name to adroc_thirtytwoston he's missing out on a golden opportunity.

Let me join you on your way out.

 

[SarahKerrigan]

Intel did 18% from SNC to GLC by blasting the core area (with L2) from 4.36mm^2 for SNC to 7.53mm^2 for GLC, that's a seventy-fricking-two percent increase in area. And don't get me started on power.

We don't have a precise measurement for Zen 5 yet, but without taking into account the L2, Zen 5 STX is only 3.46mm^2 compared to Zen 4's 2.73mm^2. (a 27% increase in area) GNR core is likely a bit bigger, but accounting for L2 I'd be surprised if it was any more than 35% bigger.

And as David Huang discovered, Zen 5 isn't even a straight up increase in some areas compared to Zen 4, the uop cache looks outright smaller for example.

I'm all for being disappointed by mediocre increase, but bringing up Golden Cove of all things as an example is just lol.

Right! This is what I'm saying. With GNC, Intel

• ... almost doubled uop cache size.
• ... Introduced a new L2 architecture with a much larger L2.
• ... Added a sixth decoder.
• ... Doubled ifetch bandwidth.
• ... Added an ALU.
• ... Added a load unit.
• ... Increased the size of queues across the board.
• ... Increased ROB capacity by ~40%.
• ... Blew out area and power to do it.

And what did it buy them? A measley 19%. So I'm going to give AMD a hell of a lot of credit for not doing that, and still managing to pull off ~15%.

 

[Nothingness]

Zen4 has AVX-512 so it is fair game.
Zen5 does have more instructions but I don't think GB uses them.

Yes and it will surely impact games.

 

[Nothingness]

Even if it's 10%, which I think is probably on the low end of what we'll see across tests, that's a solid inter-generational win in the context of what new generations of high-end microarchitectures (Arm, Apple, Intel, AMD - not IBM because their release cycles are multiple years) have been doing lately.

I guess I'm just not seeing where the disappointment is coming from. Golden Cove (specifically 12900K), gen to gen, did a perf increase on 502.gcc of under 20% iso clock, and regressed clock by 100MHz against the 11900K. And that was on a new node - the first in what, seven years? - with a far more aggressive microarchitecture than its predecessor!

I'm not disappointed. Even 10% IPC increase in 2 years looks good given the starting point already was good. I think some people underestimate what's needed to get higher and higher (as your post about Intel going crazy with GNC demonstrates).That's enough for me to replace my Haswell

A thing that might change my mind is if power is too high, in which case I'll wait for the X3D variant, I'm in no hurry.

 

[igor_kavinski]

A thing that might change my mind is if power is too high, in which case I'll wait for the X3D variant, I'm in no hurry.

You should wait for X3D regardless. It's the X3D to have due to AMD promising it will be different. It HAS to be different then otherwise even AMD loyalists will bring out the pitchforks!

 

[StinkyPinky]

The problem with X3D is that the 16 core version requires a lot of software fiddling for games etc which many of us can't be bothered with. I was hoping for example the 9900X3D would just have the "3D" cache on all cores, now that would make it a very attractive chip to get. As it stands the 7900X3D is kinda a dead rubber of a cpu

 

[inquiss]

The problem with X3D is that the 16 core version requires a lot of software fiddling for games etc which many of us can't be bothered with. I was hoping for example the 9900X3D would just have the "3D" cache on all cores, now that would make it a very attractive chip to get. As it stands the 7900X3D is kinda a dead rubber of a cpu

So if you game get the 8c version...

 

[igor_kavinski]

So if you game get the 8c version...

Or people who want cache should stop being cheap and just get a Milan-X with 768MB cache

 

[Hail The Brain Slug]

Or people who want cache should stop being cheap and just get a Milan-X with 768MB cache

That's not how this works. I, as a consumer, have wants and needs. I will not allow a corporation to tell me what I can have or want.

If they make a product I want, they get my money. If they try to force me to pay 10x more than what I'm willing to get what I want, they don't get my money.

Simple as.

 

[Hitman928]

The problem with X3D is that the 16 core version requires a lot of software fiddling for games etc which many of us can't be bothered with. I was hoping for example the 9900X3D would just have the "3D" cache on all cores, now that would make it a very attractive chip to get. As it stands the 7900X3D is kinda a dead rubber of a cpu

Alternatively, if AMD was able to clock the Vcache CCD the same as the non Vcache, you wouldn’t have to fiddle with any software or tweaks either.

 

[igor_kavinski]

That's not how this works.

AMD can dictate how it works coz Intel has no answer to V-cache yet. If people want to avoid dual CCD X3D coz it lacks the X3D cache on both CCDs, they can choose to do so. That's all they can do. AMD could discontinue dual CCD X3D due to poor sales but trying to increase sales by giving people what they want, well, we haven't seen them do that even two years after 5800X3D launch which is enough time to stockpile on quite a lot of V-cache dies.

 

[Hail The Brain Slug]

Alternatively, if AMD was able to clock the Vcache CCD the same as the non Vcache, you wouldn’t have to fiddle with any software or tweaks either.

Make the V$ CCD primary/CCD0 and CCD1 will just be a fill-in MT CCD like on the 7950X. That would do it.

 

[Hail The Brain Slug]

AMD can dictate how it works coz Intel has no answer to V-cache yet. If people want to avoid dual CCD X3D coz it lacks the X3D cache on both CCDs, they can choose to do so. That's all they can do. AMD could discontinue dual CCD X3D due to poor sales but trying to increase sales by giving people what they want, well, we haven't seen them do that even two years after 5800X3D launch which is enough time to stockpile on quite a lot of V-cache dies.

I'm not saying I can fabricate a product that doesn't exist out of thin air. I will always voice my opinion on a hypothetical product I want and would buy.

I'm saying I know what I want. If AMD doesn't make it, I'm not paying 10x the price of what I want would cost to get the closest thing.

We need to stop letting corporations control what we buy. Consumers have the final say, but not if they just capitulate.

 

[mmaenpaa]

Or people who want cache should stop being cheap and just get a Milan-X with 768MB cache

I would like to see review of this Epyc 4584PX (AM5 socket). I assume this might do well on SQL Server and "MS Flight Simulator" type loads 😁

EDIT: I missed that it has the same amount of L3 cache as consumer part, so vcache only on one CCD still :-(

 

[igor_kavinski]

I would like to see review of this Epyc 4584PX (AM5 socket).

It only seems to differ by having support for this feature: https://www.amd.com/en/products/processors/server/epyc/infinity-guard.html#infinity

 

[igor_kavinski]

Curious regression on the PCIe lanes front for the new chipsets.

Does RAID5 mean that Zen 5 has hardware RAID support???

 

[Doug S]

General compiler improvements - ie, to all targets, or to all x86 targets - happen. So do general renderer improvements.

Yes, this is something people don't want to admit when it comes time to measure how big their d- oops I mean how much of performance jump their favorite CPU got in its latest iteration. For a proper test you need to compare the old and new in a way that eliminates any benefit to the new design from those general compiler improvements. You wouldn't think it is an issue with Geekbench - just run the new version on the old hardware. But some people seem to want to skip that step and look at what the Geekbench browser "says" the number is for the old hardware (which will be measured on an older version) and use that as a point of comparison. If you insert something like SME or AVX512 support into the newer version it will be more obvious, but even without that if it is built with a new compiler version you may see some (generally minor) improvements.

This happened all the time in the RISC workstation days, the vendors would tout how big of a performance gain their new CPU was but they wouldn't re-run SPEC on the old hardware using the latest compiler. Sometimes that would be a huge difference, especially when the new compiler "broke" one of the subtests, but compilers had a lot more low hanging fruit available so the impact of a new version could be pretty significant sometimes even in "real world" results like the unbreakable and ungameable gcc subtest.

That's actually why I got a SPEC license for the university I was working for in the 90s, because when I've got faculty members with a million dollar grant burning a hole in their pocket and sales reps from Sun, HP, SGI, IBM and DEC swarming around them talking up how big of a performance gain they'd get over their old hardware I needed a way to provide a reality check.

 

[igor_kavinski]

60W: https://forums.anandtech.com/thread...ranite-ridge-ryzen-9000.2607350/post-41246800

 

[LightningZ71]

I'm looking forward to the SP6 Zen5 products. I wonder if, for this generation, AMD will bless us with a 4 CCD full fat Zen5 product with 32 Zen5 cores running at decent speeds? It would be a nice replacement for older Threadrippers out there. Even the 64 core Zen5c parts would provide a lot of grunt for workstations that use AVX-512 heavily. There are some nice SP6 workstation ATX boards out there...

 

[tsamolotoff]

Alternatively, if AMD was able to clock the Vcache CCD the same as the non Vcache, you wouldn’t have to fiddle with any software or tweaks either.

You'd still have to do that because some games can spread their threads over both ccds which will tank FPS because of inter-die traffic

 

[Hitman928]

You'd still have to do that because some games can spread their threads over both ccds which will tank FPS because of inter-die traffic

The comparison is a 2 Vcache die versus a 1 Vcache and one vanilla die. If there is an issue with thread migration across multiple CCDs, it would be there on a plain 9950x as well. Maybe the Vcache version has a little more of a hit due to losing the Vcache with the thread migration, but it would require the same solution either way. The scheduler is already supposed to prevent thread migration between CCDs as much as possible, but maybe Windows doesn't enforce this very well.

 

[tsamolotoff]

View attachment 102677

60W: https://forums.anandtech.com/thread...ranite-ridge-ryzen-9000.2607350/post-41246800

Looks like clock really tanks with low limit on Zen5, i've had like 4 ghz on my system with 90W/90W/90W limits

 

[StefanR5R]

Curious regression on the PCIe lanes front for the new chipsets.

Certainly that's 4 lanes sidetracked to a (USB) controller.

 

[Philste]

Curious regression on the PCIe lanes front for the new chipsets.

These are the 4 Lanes used for the separate Asmedia USB4 Chip. And X870 is newly labeled B650E, so it adds up. Still quite a poor chipset line.

 

[Rheingold]

Curious regression on the PCIe lanes front for the new chipsets.

• X870E is a renamed X670E with mandatory USB4 capabilities, which costs 4 lanes.
• X870 is a renamed B650E (just one Promontory chip), so just 8 additional lanes from the start, and it also has mandatory USB4