Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Exist50

Platinum Member
Aug 18, 2016
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Sorry, maybe I'm using the wrong terminology. I just mean cores present on the I/O die that Windows can't access directly but are present for background tasks (I can't define that right now). I'm pretty sure there was discussion about cores on the Intel Meteor lake SOC die. What are the chances AMD does something like that?
I know what you mean, but I don't think it's possible to have cores invisible to the OS like that. Or at least not practical. It's almost certainly not how MTL does it, at any rate.

If AMD adds cores to their IO die as well, which would be plenty reasonable, then they'll just be visible to the OS as another performance tier. Will require some tuning, but shouldn't be that bad.
 

coercitiv

Diamond Member
Jan 24, 2014
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Here is your answer for hybrid:

Et tu, Videocardz?

Videocardz:
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design

The source artcile Videocardz is quoting as proof:
While AMD stopped short of confirming that the underlying design used a hybrid architecture, the details line up so perfectly with the rumor that it's all but certain.

Both articles are 99% fluff discussing earlier leaks. The only new information is AMD confirmed the existence of a 6-core APU design.
 

dacostafilipe

Senior member
Oct 10, 2013
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What about the possibility of "shadow" cores that aren't OS transparent but are present on the I/O die? I think Meteor Lake has 2 low power cores on the SOC die that aren't OS transparent?

It's possible, most SoC have cores that are not "visible" to the OS for special stuff, for example Zen SoC has an ARM Cortex for their security stuff (AMD Secure Processor). Those cores also run their own OS/Kernel.

For Meteor Lake, that's more complicated as those cores are "exposed" to the OS, but maybe a future Windows version will support DPU-like usage of "special cores".
 

eek2121

Diamond Member
Aug 2, 2005
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It's possible, most SoC have cores that are not "visible" to the OS for special stuff, for example Zen SoC has an ARM Cortex for their security stuff (AMD Secure Processor). Those cores also run their own OS/Kernel.

For Meteor Lake, that's more complicated as those cores are "exposed" to the OS, but maybe a future Windows version will support DPU-like usage of "special cores".
The cores can be hidden from the OS pretty easily. The thing is that you don’t want to do this. You WANT Windows/Linux to see a normal core. Ideally, you would provide an instruction for an OS to call that describes the topology of the system and let the OS figure out scheduling. Things like core grouping (for shared caches, thread grouping, etc), speed relative to other cores, latency, power limits, etc. would ideally all be provided. However, this is not the case currently. You can sniff out a lot of this stuff using other methods, but they can be error prone.

Similarly, applications should be able to request a specific type of thread (low speed/low power/etc). Unless Microsoft has changed things, you don’t have much control over where your thread ends up.

(note my knowledge on both x86 instructions and general low level or systems programming is out of date, so it is possible this situation could have improved. I don’t develop at that level any longer)
 
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Joe NYC

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Jun 26, 2021
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I too would like to see AMD offer 8P + 16D at the same time as 8P + 8P, so that we can finally see for ourselves what part of the desktop consumer market is willing to buy dense cores over performance cores.
The problem with the high core count products for desktop is that after you ran Cinebench and got the score, their useful life has ended.

For the rest of the life of the PC, all it needs is ~8 cores.
 

burninatortech4

Senior member
Jan 29, 2014
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It's possible, most SoC have cores that are not "visible" to the OS for special stuff, for example Zen SoC has an ARM Cortex for their security stuff (AMD Secure Processor). Those cores also run their own OS/Kernel.

For Meteor Lake, that's more complicated as those cores are "exposed" to the OS, but maybe a future Windows version will support DPU-like usage of "special cores".
My understanding is that for Zen 1-4 this has been a single core ARM Cortex A5. Any chance they move to RISC-V for Zen 5 or a different ARM core?
 

jamescox

Senior member
Nov 11, 2009
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The cores can be hidden from the OS pretty easily. The thing is that you don’t want to do this. You WANT Windows/Linux to see a normal core. Ideally, you would provide an instruction for an OS to call that describes the topology of the system and let the OS figure out scheduling. Things like core grouping (for shared caches, thread grouping, etc), speed relative to other cores, latency, power limits, etc. would ideally all be provided. However, this is not the case currently. You can sniff out a lot of this stuff using other methods, but they can be error prone.

Similarly, applications should be able to request a specific type of thread (low speed/low power/etc). Unless Microsoft has changed things, you don’t have much control over where your thread ends up.

(note my knowledge on both x86 instructions and general low level or systems programming is out of date, so it is possible this situation could have improved. I don’t develop at that level any longer)
I thought there was some patent about transparently switching a thread between a high and low performance core based on what the thread actually needs. This can be done in a transparent manner where the high performance and the low power core look like the same core to the OS. This would remove the need for scheduling tweaks on the OS side. I don't know how else you have a hidden core unless it is something like a gpu accelerator. The OS doesn't schedule threads in a gpu, the hardware/driver handles that.

Hardware switching theads wouldn't allow all of the cores to be used at the same time though. It would seem better to just use the preferred cores, or whatever scheduling hints are available in the OS, to get the high performance threads on the correct cores. This allows all cores to be used at the same time. Modern cpus have performance counters in them for all manner of things, probably including cache usage, so the cpu should be able to tell whether a thread would benefit from running on a higher performance core, so it seems like there should be something to allow the cpu to give the OS scheduler hints. I don't know if something like that already exist?

We already have a heterogeneous situation with some cores being able to clock higher than others in all cpus and some having more cache (v-cache parts). The dense cores don't really change that since they are the exact same architecture, just with smaller cache an lower clocks. The v-cache parts are large cache and slightly lower clocks.
 
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adroc_thurston

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Jul 2, 2023
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I thought there was some patent about transparently switching a thread between a high and low performance core based on what the thread actually needs. This can be done in a transparent manner where the high performance and the low power core look like the same core to the OS. This would remove the need for scheduling tweaks on the OS side. I don't know how else you have a hidden core unless it is something like a gpu accelerator. The OS doesn't schedule threads in a gpu, the hardware/driver handles that.
iirc MS now mandates all CPU cores to be OS-visible.
 

Timorous

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Oct 27, 2008
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Strange. Maybe I would be the last one who would still think 'C' suffix cores are for server/datacenter only. The sources are fighting each others until these products release in the future.:p

Also for lower power and area saving.

I would expect by the time you are loading up more than 4 cores the all core clock is probably low enough that the c cores are more efficient than the standard cores and when doing basic stuff like web browsing the c cores will be more power efficient.
 
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Gideon

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Nov 27, 2007
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What are the current rumors on the launch window for different Zen 5 products?

Has there been any speculation/leaks that's more precise than the confirmed "in 2024"?. Is Strix really arriving before Granite Ridge?
 

SteinFG

Senior member
Dec 29, 2021
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What are the current rumors on the launch window for different Zen 5 products?

Has there been any speculation/leaks that's more precise than the confirmed "in 2024"?. Is Strix really arriving before Granite Ridge?
Not confirmed but current estimates are Q1-Q2 for granite, Q2-Q3 for strix. I don't think strix is arriving earlier than granite.
 

eek2121

Diamond Member
Aug 2, 2005
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What are the current rumors on the launch window for different Zen 5 products?

Has there been any speculation/leaks that's more precise than the confirmed "in 2024"?. Is Strix really arriving before Granite Ridge?
No idea, but if AMD sticks with normal cadence, mobile parts will be announced in January and gradually release throughout the year, while desktop parts will release late Q3 or sometime in Q4 of next year.
 

coercitiv

Diamond Member
Jan 24, 2014
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No idea, but if AMD sticks with normal cadence, mobile parts will be announced in January and gradually release throughout the year, while desktop parts will release late Q3 or sometime in Q4 of next year.
If AMD sticks with normal cadence then desktop parts can launch even relatively early next year. AFAIK Zen 4 was intentionally delayed to market by 1-2 quarters and AMD's "usual" target between gens is lower than 18 months.

I'm not saying this as being optimistic about an early 2024 launch, I'm merely pointing out that historical trend does not point towards a late 2024 release.