- Mar 3, 2017
- 1,607
- 5,799
- 136
I hope for 12core chiplet for Zen5. If there will be 24core chip and stick to same clocks as Zen4, that will be the one i replace my 7950x with in the future.
I know following's being repeated, bear with me: Anything less than exceptional for Zen 5 would frankly be a disappointment. The reason is that Zen 1 through 3 were all planned and mainly executed during the time AMD was bordering bankruptcy. Zen 4 is an extension of Zen 3 which limits the kind of changes applicable. Zen 5 is the first all new core family that started when AMD was in financially safe waters again, so with access to resources the teams working on especially Zen 1 and 2 could only dream of. This should make a huge difference.I know Clark and Papermaster were excited to talk about Zen5 just after Zen4 came out. Something exceptional must must be coming out if they talked about it that soon after a major launch.
Just because AMD had more money when they started designing Zen5 doesn't mean It would end up exceptional.I know following's being repeated, bear with me: Anything less than exceptional for Zen 5 would frankly be a disappointment. The reason is that Zen 1 through 3 were all planned and mainly executed during the time AMD was bordering bankruptcy. Zen 4 is an extension of Zen 3 which limits the kind of changes applicable. Zen 5 is the first all new core family that started when AMD was in financially safe waters again, so with access to resources the teams working on especially Zen 1 and 2 could only dream of. This should make a huge difference.
CCD | die size (measured) | Uncore size | L3 size | Core + L2 + power banks size | die size (calculated) |
Zen3 | 80.72 mm2 7nm | 11.22 | 35.52 | 8 * 4.11 | 79.62 mm2 |
Zen4 | 70.74 mm2 5nm | 12.19 | 25.10 | 8 * 3.84 | 68.01 mm2 |
Zen4 12C Zen4 36MB L3 | ~88 mm2 5nm | 12.19 | 28.24 | 12 * 3.84 | 86.51 mm2 |
Zen4 16C Zen4 32MB L3 | ~100 mm2 5nm | 12.19 | 25.10 | 16 * 3.84 | 98.73 mm2 |
How many design teams does amd have ?Just because AMD had more money when they started designing Zen5 doesn't mean It would end up exceptional.
What would be even considered as exceptional for Zen5?
+40% ST and +100% MT in CBR23 for example?
For comparison: Zen3 5700x (65W) vs Zen4 7700(65W)
CB R23 ST: 1538 vs 1916 (+25%)
CB R23 MT: 13660 vs18720 (+37%)
Increasing MT performance is relatively easy to do, but that ST performance will be very hard.
We can't expect much higher clocks, but 6GHz should be doable, that's ~6% higher performance.
The rest has to come from IPC and 32% higher IPC is a lot to ask for If we want ~40% better ST performance.
Just the core size would increase significantly, but better process should compensate.
If IPC is only 20% better, then ST performance will improve by only 27%, which is comparable to what we saw with Zen4. So nothing exceptional.
For better MT, AMD just needs to add 50% more cores + 20-32% better IPC and you are at +80-98% higher MT performance If clocks stay the same.
The question is how would CCX(CCD) look like.
AMD can opt for 6x Zen5 + 6x Zen4c or be more aggressive and go for 8x Zen5 + 8x Zen4c per CCX(CCD). I would keep L3 at 32-36 MB, no reason for more when cache scaling is already an issue with 5nm process.
I can't tell how big this 12-16C Zen5+4c CCD on 3nm would be, but It shouldn't be bigger than 12-16C Zen4 version on 5nm process.
CCD die size (measured) Uncore size L3 size Core + L2 + power banks size die size (calculated) Zen3 80.72 mm2 7nm 11.22 35.52 8 * 4.11 79.62 mm2 Zen4 70.74 mm2 5nm 12.19 25.10 8 * 3.84 68.01 mm2 Zen4 12C Zen4 36MB L3 ~88 mm2 5nm 12.19 28.24 12 * 3.84 86.51 mm2 Zen4 16C Zen4 32MB L3 ~100 mm2 5nm 12.19 25.10 16 * 3.84 98.73 mm2
I think we can expect significantly better MT, but I am pretty sceptical about ST being higher than 20-25%.
Like RDNA3, which was such a waste of all those awesome perf charts which you worked on so much day after dayJust because AMD had more money when they started designing Zen5 doesn't mean It would end up exceptional.
Efficiency? Scalability? Flexibility?What would be even considered as exceptional for Zen5?
+40% ST and +100% MT in CBR23 for example?
They would need to beat Zen 4 perf increase at the very least. There must be a good reason Mike Clark is excited about Zen 5 when Zen 4 is not even launched.For comparison: Zen3 5700x (65W) vs Zen4 7700(65W)
CB R23 ST: 1538 vs 1916 (+25%)
CB R23 MT: 13660 vs18720 (+37%)
Increasing MT performance is relatively easy to do, but that ST performance will be very hard.
We can't expect much higher clocks, but 6GHz should be doable, that's ~6% higher performance.
The rest has to come from IPC and 32% higher IPC is a lot to ask for If we want ~40% better ST performance.
Just the core size would increase significantly, but better process should compensate.
If IPC is only 20% better, then ST performance will improve by only 27%, which is comparable to what we saw with Zen4. So nothing exceptional.
By resources, do you mean engineers? They can't increase the number of engineers too much because then the effort in communication and co-ordination between them becomes a substantial overhead. I remember that Jim Keller said that one of his guiding principles was to limit the number of people in teams. I think the resources argument is kind of moot because humans tend to work best within constraints. Giving a bunch of engineers whatever they need may make them lazy and complacent and overconfident. A balance has to be struck. With how AMD has been struggling to execute flawlessly lately, it seems the influx of cash isn't making things better. I think servers is the only space where we haven't heard any negative reports of AMD stumbling recently. Whoever is in charge of that division, they need more of them.so with access to resources the teams working on especially Zen 1 and 2 could only dream of. This should make a huge difference.
That's assuming the Zen 5 CCD uses N3E.Like RDNA3, which was such a waste of all those awesome perf charts which you worked on so much day after day
Efficiency? Scalability? Flexibility?
They would need to beat Zen 4 perf increase at the very least. There must be a good reason Mike Clark is excited about Zen 5 when Zen 4 is not even launched.
At the very least N5 --> N3E should yield as much perf as the N7 --> N5 transition if not better.
View attachment 74924
I think they will improve frequency minimally, but claw back a lot of efficiency, which would be absolutely needed in case of bigger cores. But 5% perf they can manage which would put 6GHz+ easy in range (5.7 * 1.05 = ~ 6GHz, in fact my 7950X can boost to 5.88 GHz, on GB ST).
Zen 4 CCD has an abysmally low density for N5 at ~93 MTr/mm2. The thermal hotspot also is a constraint.
You are right, they were awesome until we saw the cruel reality.Like RDNA3, which was such a waste of all those awesome perf charts which you worked on so much day after day
This doesn't tell me much, and I think these were also true for Zen4.Efficiency? Scalability? Flexibility?
Yeah, Mike Clark was very optimistic about Zen5 in that Anandtech interview. He even said he can't wait to buy one, but It's not like he was comparing It to Zen4.They would need to beat Zen 4 perf increase at the very least. There must be a good reason Mike Clark is excited about Zen 5 when Zen 4 is not even launched.
At the very least N5 --> N3E should yield as much perf as the N7 --> N5 transition if not better.
View attachment 74924
I think they will improve frequency minimally, but claw back a lot of efficiency, which would be absolutely needed in case of bigger cores. But 5% perf they can manage which would put 6GHz+ easy in range (5.7 * 1.05 = ~ 6GHz, in fact my 7950X can boost to 5.88 GHz, on GB ST).
Zen 4 CCD has an abysmally low density for N5 at ~93 MTr/mm2. The thermal hotspot also is a constraint.
If AMD will still use N4, then I don't think we can expect big increases.That's assuming the Zen 5 CCD uses N3E.
That's assuming the Zen 5 CCD uses N3E.
If AMD will still use N4, then I don't think we can expect big increases.
"You should expect to see , you know, 4nm and 3nm versions of Zen 5 and you will see them in 2024" - Lisa Su
Exciting stuff! But almost two years away since it's gonna be more Q4 2024"You should expect to see , you know, 4nm and 3nm versions of Zen 5 and you will see them in 2024" - Lisa Su
Exciting stuff! But almost two years away since it's gonna be more Q4 2024
Not holding my breath for that but yeah, that would be really nice if it happens.Should be H1 next year cause STX and Turin lineup with Zen 5 core are expected before Q2 next year...
Yeah, timings are tight especially AMD has to fight with Apple and Intel to get allocation of N3B/E nodes. That is why I think desktop and server version of Zen5 cores will use N4P process. Only STX lineup are mostly based on N3ENot holding my breath for that but yeah, that would be really nice if it happens.
AMD could further enhance Zen5 core architecture, adding more cores (I expect double cores ) and bundle V-cache as standard. So still pretty headroom to go...If AMD will still use N4, then I don't think we can expect big increases.
I don't see that happening. It's not an easy process and they have limited manufacturing capacity to do that. Plus, they have their server obligations which will further prevent them for flooding the market with affordable V-cache CPUs.bundle V-cache as standard
There is going to be too much capacity.AMD has to fight with Apple and Intel to get allocation of N3B/E nodes.
The current V-Cache are manufactured by N6 process, which has ample production capacity by now. That's why no more shortage of PS5 (PS5's SoC are made by N6 process).I don't see that happening. It's not an easy process and they have limited manufacturing capacity to do that. Plus, they have their server obligations which will further prevent them for flooding the market with affordable V-cache CPUs.
There is going to be too much capacity.
TSMC did not actually start the F12P9 meant for Intel, only F12P8. Intel have cut orders.
Plenty of N3 is there by beginning of 2024. F18P5/6/7 are for N3 and F18P4 also was doing N3 as well during risk production in 2022. And by 2H24 Fab18P8 will be online.
No more expansion for N3 and TSMC is actually starting to build N2 fabs now, they already have clearance to build behind the Fab12P9 in Hsinchu.
The V-cache die is not the limitation. The bonding process is. I read somewhere that currently TSMC has a production limit of about 30K V-cache CPUs per month. Has there been any progress in increasing that rate?The current V-Cache are manufactured by N6 process, which has ample production capacity by now.
You might need to wait until 2025 for such configuration to happenI am starting to consider waiting for Strix Point, If It's using 3nm and has 12-16 cores + 20-24CU IGP.
I will buy 64GB DDR5, set 16GB for IGP and will laugh at anyone who bought N33, Ada107 or Ada106 with only 8GB Vram.
Yeah, Mike Clark was very optimistic about Zen5 in that Anandtech interview. He even said he can't wait to buy one, but It's not like he was comparing It to Zen4.