- Jan 8, 2001
That would make sense to me. 12 cores is about the max for ring archs. They require additional nodes for memory and IO. It’s sort of like token ring networks, at each node has a tag has to be read and a determination whether this is the correct node, or if it has to be retransmitted and forwarded further down the ring. They latency really starts adding up and becomes too variable above that number (total ~ 14 nodes).I hope for 12core chiplet for Zen5. If there will be 24core chip and stick to same clocks as Zen4, that will be the one i replace my 7950x with in the future.
Low frequency Zen4c like chiplet (with Zen5 ISA) would make a great upper tier Zen5 SoCs with P&E architecture. (Zen5c chip let’s could be scavenged dice that weren't suitable for low power server use - maybe 12 cores).
I know Clark and Papermaster were excited to talk about Zen5 just after Zen4 came out. Something exceptional must must be coming out if they talked about it that soon after a major launch.