WTF does 'Cold Bug' mean?

[Witchfire]

I've seen the phrase used quite a few times now, and I get the general idea it means that when a processor gets too cold under phase change, bad things happen. More than that, I haven't been able to get info about. With the upcoming possibility of getting a phase change unit on the cheap (comparatively) now that OCZ is shooting for sub-$300 price tags after launch, I'm really interested in getting some good info on this.

Thanks,

Witchfire

 

[Shimmishim]

well.

i'm not sure exactly what happens (at the molecular level) but for some reason when a processor core gets too cold, the chip starts acting weird...

either you can't get above a certain HTT or get the computer to boot or the computer freezes...

for most users, singele stage phase change won't be a problem...

the extreme guys are using cascade or DI or LN which get temps to anywhere from -60 to -100C's.

single stage will get you temps hotter than -60C's.

with the OCZ phase change unit... i'm sure that it won't hold a load THAT low...

for the opterons...

CABNE's seem to have cold bug but at VERY low temps
CABYE's are okay but not beyond single stage but there have been some that have been able to use auto cascades...
CAB2E's are cold bugged pretty badly
CACJE's... well... don't even try with these... i hear they can't get below 10C's w/o suffering symptoms....

as for the dual cores... not really sure... anyway...

 

[anandtechrocks]

Has to do with the memory controller not being able to fuction at such low temperatures. That's why Intels can go so high on phase/cascade/ln2

 

[dmens]

It refers to a timing-related circuit failure due to temperatures lower than validated process corners. At low temperature extremities, the usual failure mode is a hold time violation (aka min delay), where a sequential element fails to hold a value long enough for a downstream element to close, causing an unintended value to be blow through and get latched downstream. Since this failure is based on delays between sequentials, it is frequency independent and cannot be fixed by adjusting the cycle time. The only way to fix these failures is by changing the design or tweaking the clock edges.

 

[Witchfire]

Thanks Guys, much appreciated to have a clear answer so quick. :beer:

I'm getting more & more interested in phase change, so I'm wondering... Does anyone know if the Opteron 150 CACBE has a cold bug, & roughly what temp it might rear it's ugly head?