News [Wired] PS5 confirmed to use 7nm Zen 2, Navi, SSD

[Arkaign]

Yeah but that would pretty much be one quarter of the total cost...

The supply pricing is plummeting, and as production of spinners decreases, the cost may actually flip at some point in the near future, perhaps even before fall of 2020. 1TB 2.5" HDDs on Amazon float around $50, with rare (5400RPM) examples popping in at $40ish once in a while. 1TB SSD is $90-$100, however a corporation the size of Sony (or Microsoft) may be able to get far greater deals on volume, especially with reports of oversupply in NAND.

The other side of this is that a not inconsiderable amount of the cost of an SSD is the controller : the processor itself, the extra traces/PCB complexity, and the space used on the PCB that can't be filled with NAND (this means higher density / more expensive chips needed for higher capacity drives). The description of the PS5 SSD by Cerny seems to indicate they've done something clever here. I'm thinking perhaps a mobo/APU-side SSD controller, which would enable controllerless NAND/SSD storage, and that would definitely drop prices down to HDD levels and probably even lower in short order.

In any case, the full technical reveal will be interesting FWIW I do expect a 1TB SSD and no spinner whatsoever, but of course I don't think that will be all that impressive in fall 2020. The pricing paradigm for SSD and HDD is shifting quickly now. I think HDDs are pretty quickly going to vanish outside of high capacity models. 500GB HDDs are almost impossible to justify today. Very soon 1TB will follow suit. Then 2TB+ and so on. I think spinners will remain relevant for large bulk storage for a little while yet (4-6 years?), but the smaller ones should fall pretty quickly.

500GB HDDs, dead in 2019 basically
1000GB HDDs, dead in 2020 probably
2000GB HDDs, dead in 2021-2022 ..
etc

 

[jpiniero]

The Jag is trash. It always was. It really put serious limitations on open world or more complex AI for 8th gen. It makes the more impressive first party titles even more impressive when you consider that the Jag is worse than mediocre cell phone CPUs.

Jaguar is definitely slow but it's not that slow. The IPC is comparable to Dozer. Probably looking more like 5-6X performance improvement if it's at 3 Ghz.

 

[VirtualLarry]

The other side of this is that a not inconsiderable amount of the cost of an SSD is the controller : the processor itself, the extra traces/PCB complexity, and the space used on the PCB that can't be filled with NAND (this means higher density / more expensive chips needed for higher capacity drives). The description of the PS5 SSD by Cerny seems to indicate they've done something clever here. I'm thinking perhaps a mobo/APU-side SSD controller, which would enable controllerless NAND/SSD storage, and that would definitely drop prices down to HDD levels and probably even lower in short order.

Doesn't AMD already have a workstation dGPU for Compute, that has NVMe sockets on it? Perhaps it's a variant of that technology, with the controller integrated into the GPU?

 

[thigobr]

Yes, this it it Radeon Pro SSG
https://www.amd.com/en/products/professional-graphics/radeon-pro-ssg

 

[escrow4]

I wouldn't say the Jaguar is completely hopeless but there will always be limits no matter what SoC you stuff in. Besides, look at AC Odyssey - gigantic world but its nearly all copy paste - in 100 hours half of that is the doing the exact same thing in a different part of a slightly re-skinned area. You could add in more AI and more everything but it would still be a bore. And no matter what hardware you stick in devs will adapt. The bigger problem is Orbis itself and the background OS. Look at all the stuff stuffed in compared to the PS2, even with a secondary ARM processor there are still resources taken from gaming that just sits there in the background.

 

[Arkaign]

Doesn't AMD already have a workstation dGPU for Compute, that has NVMe sockets on it? Perhaps it's a variant of that technology, with the controller integrated into the GPU?

Good catch, yeah I think that type of experience in this area could help in the area I'm talking about.

For reference, here is a pic of a Samsung 970 Pro, with the 'Phoenix' SSD processor. You can see the size it takes on an M.2 card, and infer the cost associated with the traces, the processor itself, and the cost in terms of space. If they're able to negate the need for the controller to be a part of their default M.2 SSD component, and rather have that functionality run from the APU or chipset itself, the benefits in cost should be excellent.

That's IF they don't go soldered on, which I hope they don't do. And I'd imagine that given AMDs experience with Zen chipset design that the thing should be easily compatible with aftermarket upgrades as well, controllerless or no. It's a design optimization that I hope definitely crosses over into general PC hardware space, because duplicating these SSD controller chips on every SSD seems wasteful vs having it natively managed at the processor level.

 

[Arkaign]

Oops, here it is

 

[VirtualLarry]

because duplicating these SSD controller chips on every SSD seems wasteful vs having it natively managed at the processor level.

I hear ya. Maybe, just maybe, there might be a way to multi-plex the PCI-E 4.0 x4 NVMe lanes coming off of the Ryzen CPU complex (I/O controller die?), such that those pinouts could be used to directly drive/address a "NAND-only stick", that could plug into the NVMe socket, but be driven like a PCI-E NVMe SSD, but much, much cheaper, because the SSD controller would be on the I/O die? How many pins do NAND dies need, compared to PCI-E x4? Could that even be doable somehow? (New! Ryzen CPU "Controllerless SSD" feature, now with StoreMI Extreme!")

Edit: Some mobos have 22110 layouts on the board, could the shorter PCBs (without controllers or DRAM onboard), allow for 2x 2242 or smaller SSDs, in the same board layout area as a 22110?

Imagine the number of M.2 "Controllerless SSDs", you could fit on a ThreadRipped ATX or E-ATX board, in between PCI-E x16 physical slots, if they were all 2242 sized? And all running in parallel on the CPU I/O die or chipset, the equivalent of 3x or 4x PCI-E x8 (x4 slot equivalent, times two 2242, per board "area" for M.2 SSDs").

 

[beginner99]

The supply pricing is plummeting, and as production of spinners decreases, the cost may actually flip at some point in the near future, perhaps even before fall of 2020.

Still with this hardware a cost target of even $500 seems not possible unless Sony wants to sell the hardware at cost. A 8-core zen2 on 7nm will easily cost $150 alone on free market and roughly the same for the included GPU. That is the free market, of Course sony will pay a lot less but I doubt it can be below $150 for the soc alone. If you add all the additional hardware and the fact that of the store price, the store gets a meaningful piece of it anything below $500 seems too low.

It's a design optimization that I hope definitely crosses over into general PC hardware space, because duplicating these SSD controller chips on every SSD seems wasteful vs having it natively managed at the processor level.

The contorller is the one things the ssd maker differentiate their products and create pricing tiers. If you put that on the CPU, it will be outdated within a couple of years and still would need regular firmware/BIOS updates for new NAND types. The controller is not magically compatible with next-gen NAND. It's a good idea for a console but not for the PC space.

 

[alcoholbob]

Still with this hardware a cost target of even $500 seems not possible unless Sony wants to sell the hardware at cost. A 8-core zen2 on 7nm will easily cost $150 alone on free market and roughly the same for the included GPU. That is the free market, of Course sony will pay a lot less but I doubt it can be below $150 for the soc alone. If you add all the additional hardware and the fact that of the store price, the store gets a meaningful piece of it anything below $500 seems too low.



The contorller is the one things the ssd maker differentiate their products and create pricing tiers. If you put that on the CPU, it will be outdated within a couple of years and still would need regular firmware/BIOS updates for new NAND types. The controller is not magically compatible with next-gen NAND. It's a good idea for a console but not for the PC space.

I'm sure volume cost is very low. AMD 7870 was still over $200 when the PS4 launched.

And when RX 590 launched it was $280--even though it's much slower than the Xbox One X GPU (36 vs 40 CU Polaris) which is $399, and even routinely falls much less during sales.

Now I know the industries are different, but take audio DIY for example. The retail OEM cost for most off-the-shelf drivers is often more than 2x what it will cost to a high volume vendor. For example I was looking at a pair of tweeters which cost around $700 on OEM sites like Madisound or Partsexpress. Now a speaker manufacturer like Tekton can build you a speaker and use those a pair of those tweeters. How much do they charge you for those tweeters? $300. So volume discounts can be massive.

 

[PotatoWithEarsOnSide]

The future of consoling game is to sell hardware at cost pricing, and monetize the platform itself. Continuous revenue is better for them than diminishing revenue through hardware sales.

 

[Arkaign]

Still with this hardware a cost target of even $500 seems not possible unless Sony wants to sell the hardware at cost. A 8-core zen2 on 7nm will easily cost $150 alone on free market and roughly the same for the included GPU. That is the free market, of Course sony will pay a lot less but I doubt it can be below $150 for the soc alone. If you add all the additional hardware and the fact that of the store price, the store gets a meaningful piece of it anything below $500 seems too low.



The contorller is the one things the ssd maker differentiate their products and create pricing tiers. If you put that on the CPU, it will be outdated within a couple of years and still would need regular firmware/BIOS updates for new NAND types. The controller is not magically compatible with next-gen NAND. It's a good idea for a console but not for the PC space.

Well, let's hypothetically say the PS5/Zen2 controller is capable of 6000MBps for NAND in a compatible manner. Wouldn't this be similar to when memory controllers went from chipset level to on package?

The M.2 is just an interface, currently there are SATA M.2 SSDs and ones that use up to 4 PCIe lanes (@3.0).

What we essentially have right now is every SSD having its own controller, sort of like every stick of Ram having to have its own memory controller onboard a DIMM. Seems like a waste in a way.

If having an on-die SSD/NAND controller allowed for controllerless NAND SSD cards (in compatible format), I don't see why it would preclude the existence of specialized SSDs that still had their own controllers. But if one is 6000MBps 1TB @ $36 vs 8500MBps @ $180 in 2020, it could be a pretty big driver in the value proposition. Of course we have no idea what the exact costs would be, it's just clear that looking at M.2 NVME drives like the Samsungs and such that price is a definite factor here. SATA is going to be headed the way of IDE ports before very long, so tiers of options on storage of the future seems acceptable. And different generations of such needing to be compatible wouldn't be a huge shock. Some systems can only use SATA M.2, just like some systems require DDR3 vs DDR4, or ECC RDIMMs, etc.

 

[NTMBK]

Remember that Sony is in this for the long haul, and NAND prices are only going down. If as Arkaign suggests they basically just have commodity NAND soldered to the board with an integrated controller, then even if they take a bit of a loss in year 1 then I'm sure by years 2-5 it will be dirt cheap. It's more valuable to Sony to have the install base all running on awesome fast storage, as then all games can be designed around that. Remember that they managed to cram 8GB of GDDR5 into the PS4 at launch, which was a big gamble in 2013!

I think a hybrid storage solution would be a a short sighted choice. It might save cost right now, but it increases complexity, massively complicates things for developers (as they essentially can't rely on SSD performance when they need it), and probably will work out more expensive by year 5.

 

[joesiv]

My take is that there was a bit of smoke and mirrors with the SSD comparison for next gen PS5.

We all have to remember that the OG PS4 has a super slow spinning laptop drive in it.
https://documents.westerndigital.co...r-z5k-series/data-sheet-travelstar-z5k500.pdf
The specs from the mfg are 1Gbit/s transfer speeds
for example some user benchmarks on this drive:
https://hdd.userbenchmark.com/SpeedTest/664/Hitachi-HTS545050A7E380
100MB/s read/write

Whereas a consumer grade NVME drive will get 1500MB/s read/write
https://ssd.userbenchmark.com/SpeedTest/493995/Samsung-SSD-970-EVO-500GB

Cerny's example was going from 15 seconds to 0.8 seconds... That's around 19x faster.

Even going off a current samsung nvme compared to the previous ps4 hdd, we are already at 15x faster.

The PS4 drive being a 5400rpm spinning drive it would not be hard for any SSD to get much greater gains in random IO as well.

My take is, it's nothing super fancy. Perhaps it's an nvme drive using gen4 pcie, perhaps it's next generation NAND sitting on the board directly connected to the CPU, but I don't think to get 19x's faster than the PS4 is that hard, the bar was set so low with the PS4.

I'm personally excited about the prospect of tiered storage out of the box. For example small fast SSD storage, perhaps fairly small to keep costs down (256GB?), with removable storage as a larger data drive, perhaps replaceable, or user added. AMD has storeMI, perhaps something along those lines to make it as one large pool.

 

[VirtualLarry]

If you put that on the CPU, it will be outdated within a couple of years and still would need regular firmware/BIOS updates for new NAND types. The controller is not magically compatible with next-gen NAND. It's a good idea for a console but not for the PC space.

I don't understand why that's an issue. The DRAM controller is the same way, isn't it? It's on-die, on the CPU, it needed regular AGESA updates to be more compatible with faster DDR4 RAM speeds over the last year or so on AM4, and it's also no "magically compatible" with next-gen DRAM (DDR5) either. But ... that's not such a big drawback, that AMD didn't integrate a DRAM controller into their CPUs, and instead, piped it over a PCI-E connector, did they?

In short, your reasons against it are noted, but I don't really think that they are realistic objections, as you could say the same things about the CPU-integrated DRAM controller, and those reasons didn't stop them from doing that, did they?

 

[William Gaatjes]

AMD does not have to make a NAND controller perse on the IO die.
There are quite a few dram less PCIe3.0 x 2 or (maybe evenx4) controllers out there that even allow to be combined witn NAND in a single bga package.
This is called BG3 IIRC.
For example :
https://www.anandtech.com/show/12819/the-toshiba-rc100-ssd-review

This would allow outsourcing of the nand flash controller and nand flash packaging.
For example 88NV1160 is PCIe x2 But still able to do a max read speed of 1600MB/s.
PCIe has a lot of benefits when compared to a lot of parallel connections.
PCIe link training solves a lot of routing issues that exist when using a lot of parallel connections like flash memory has.
Whoever thought up PCIe are bunch of smart people.
I find the polarity reversal solving during link training amazing. (It is also used in the USB3.0 and higher connections).
The polarity reversal allows for easier routing of the N and P lines of the differential pairs.
I am sure some ssd controller company and packaging company would be very happy with such a contract.
And since the whole system is optimized as a fixed hardware design. Using main memory as buffer(NVMe Host Memory Buffer (HMB) ) for the flash controller (With custom firmware) is a lot easier to implement and optimize.

Here is a nice list of dram less ssd controllers.
https://forums.anandtech.com/threads/list-of-dram-less-ssd-controllers.2440567/


Another one from samsung.
https://www.anandtech.com/show/10166/samsung-demos-its-first-bga-ssd

BGA SSDs with PCIe 3.0 or SATA interfaces will be a part of the PCI SIG’s M.2 specifications. At present select members of the organization (HP, Intel, Lenovo, Micron, SanDisk, Seagate and Toshiba) propose four types of soldered-down solid-state storage solutions: Type 1620, Type 2024, Type 2228 and Type 2828. M.2 types traditionally define width and length of the package in millimeters, so, the smallest BGA SSD will have measurements of 16 × 20 mm, whereas the largest BGA SSD will feature 28 × 28 mm packaging. SSDs in a BGA package may have Z-height up to 2 mm (measured with solder balls collapsed), but may be slimmer.

 

[beginner99]

What we essentially have right now is every SSD having its own controller, sort of like every stick of Ram having to have its own memory controller onboard a DIMM. Seems like a waste in a way.

If having an on-die SSD/NAND controller allowed for controllerless NAND SSD cards (in compatible format), I don't see why it would preclude the existence of specialized SSDs that still had their own controllers.

Maybe I'm wrong but ssds go over pcie and for that even the controller-less ssd would still need some chip to communicate over pcie. the nand can't directly do that itself. I mean a ssd controller has channels to which one can attach NAND chips. how would that work over pcie? I'm not even sure it's possible technically.

Besides that on PC space Intel or amd would need to integrate that and why should they? it costs die space but more importantly validation time. There is no incentive for them to do so, monetary wise and hence it won't happen. PS5 of course is a different story but I still don't really see the point of it. These controllers are tiny and cheap.

 

[William Gaatjes]

Maybe I'm wrong but ssds go over pcie and for that even the controller-less ssd would still need some chip to communicate over pcie. the nand can't directly do that itself. I mean a ssd controller has channels to which one can attach NAND chips. how would that work over pcie? I'm not even sure it's possible technically.

Besides that on PC space Intel or amd would need to integrate that and why should they? it costs die space but more importantly validation time. There is no incentive for them to do so, monetary wise and hence it won't happen. PS5 of course is a different story but I still don't really see the point of it. These controllers are tiny and cheap.

Indeed. Let ssd controller manufacturers do what they do best. And now there are a lot of them.
Prices are not that high for ssd controllers, especially dram less. And it is possible to use for a console with a limited lifetime, instead of using any M2 connector format, to solder the BGA package(with PCIe dramless controller end NAND flash ) directly on the main pcb.
This reduces BOM.

 

[NTMBK]

It's worth bearing in mind that the PS4 Pro already has a separate 1GB DDR3 memory pool attached to the custom "southbridge" chip, for handling OS tasks. Maybe it would make sense for the PS5 to put the storage controller in the new southbridge chip, and connect that chip with PCIe4x4? Then they aren't bumping up the pin count for the (expensive) main 7nm APU. It also makes background install of games more efficient, as just the southbridge with its integrated ARM cores can be powered on, driving the SSD and getting data from the network controller. And then the southbridge DRAM can serve as the SSD cache.

 

[beginner99]

It's worth bearing in mind that the PS4 Pro already has a separate 1GB DDR3 memory pool attached to the custom "southbridge" chip, for handling OS tasks. Maybe it would make sense for the PS5 to put the storage controller in the new southbridge chip, and connect that chip with PCIe4x4? Then they aren't bumping up the pin count for the (expensive) main 7nm APU. It also makes background install of games more efficient, as just the southbridge with its integrated ARM cores can be powered on, driving the SSD and getting data from the network controller. And then the southbridge DRAM can serve as the SSD cache.

All this takes developemnt and validation effort and then you need to ensure you have a provider for the special controller less ssds you use. vs just using AMDs existing IP (pcie controller) and using bog standard nvme ssds. Minimal effort needed and you can just source the ssd from the cheapest supplier at any given time.

 

[joesiv]

It would be cheaper to buy the UFS3.0 chips (successor to eMMC) and integrate it onto the board. Transfer speeds of UFS3.0 are up to nearly 3GB/s now. That would probably meet or exceed the necessary improvements Cerny has shown.

 

[William Gaatjes]

The SM2263XT from silicon motion is a dram less model with a PCIe3 x4 interface and .

It would be cheaper to buy the UFS3.0 chips (successor to eMMC) and integrate it onto the board. Transfer speeds of UFS3.0 are up to nearly 3GB/s now. That would probably meet or exceed the necessary improvements Cerny has shown.

I am not fully up to date, but i am not sure M - PHY (UFS interconnect) is such a suited interconnect connecting main storage in a console that needs not only fast read speed but also fast write speed. M-PHY seems asymmetrical in TX an RX directions. But i could be wrong because it depends on the revision.

To be honest, the only reason i know about PCIe is that i am currently for work designing an embedded system with PEX switches and has USB3.x ports, sata ports, USB2.0 and PCIe2.0 lanes.
It is very interesting stuff. The PCIe creators did a great job.

 

[joesiv]

The SM2263XT from silicon motion is a dram less model with a PCIe3 x4 interface and .


I am not fully up to date, but i am not sure M - PHY (UFS interconnect) is such a suited interconnect connecting main storage in a console that needs not only fast read speed but also fast write speed. M-PHY seems asymmetrical in TX an RX directions. But i could be wrong because it depends on the revision.

To be honest, the only reason i know about PCIe is that i am currently for work designing an embedded system with PEX switches and has USB3.x ports, sata ports, USB2.0 and PCIe2.0 lanes.
It is very interesting stuff. The PCIe creators did a great job.

Yeah, I don't know all that much about this next generation UFS stuff, I haven't gotten my hands on it and there arn't any shipping products with it yet either.

My line of work has me dealing with low powered embedded arm systems, and we use eMMC, and I drool over that which I can't have (cost/power) lol...

 

[William Gaatjes]

Yeah, I don't know all that much about this next generation UFS stuff, I haven't gotten my hands on it and there arn't any shipping products with it yet either.

My line of work has me dealing with low powered embedded arm systems, and we use eMMC, and I drool over that which I can't have (cost/power) lol...

Oops, that SM2263XT sentence was part of a message i decided not to post. It is an interesting model though.
But yeah, UFS definitely is interesting as is M-PHY. M-PHY has something PCIe does not, variable clockspeed to increase or decrease the bandwidth with as result very low power consumption capability but with some added latency i assume when changing clock frequency. Which is ideal for small battery powered devices that need some high performance but not at every cost.
Although PCIe allows for sleep modes where the clock is turned off, saving power.