Why sparc?

[degibson]

As an aside, there is a decent primer on the various flavors of core-multithreading in the Niagara (1) Micro paper (hot chips issue), available at Olukotun's site, on page 28:
http://ogun.stanford.edu/~kunl...tions/niagra_micro.pdf

Note: Micro's Hot Chips issue is something like the 'National Geographic' of computer architecture... mostly descriptions of systems versus research, hence the weird magazine formatting.

 

[CTho9305]

Historically, when it came to I/O throughput real workstations trounced consumer hardware. This UltraSPARC IIIi system could get you 4.2GB/sec to main memory, and had multiple PCI buses - one dedicated to 64-bit 66MHz PCI slot and four slots on the second PCI bus (2 64 bit, 2 32 bit). It also had 1MB of L2 cache, which was more than you could get on an Athlon. Sun's processors historically had large caches. Workstations were usually equipped with very fast hard drive configurations too (e.g. SCSI + RAID). The IIIi came out in 2003. Socket 754 (late 2003) gave you 3.2GB/sec of memory bandwidth, and socket 940 (for the first Opterons - which came out later in 2003 than the us IIIi) gave you 6.4GB/sec (I don't remember if the RAM needed for those speeds was available when the first Athlon 64 / Opterons shipped).