Why RISC it?

[unlockthesource]

***This post should not be moved to the CPU forum, since the people there rarely discuss non x84 chips, and becuase i want a more technical (electrical eng.) discussion.***

So whats all the hype about the Reduced Instruction Set Chip?

It runs a whole lot of the UNIX web servers we visit everyday, and powers all the Mac's. What so special about this type of chip?

 

[imgod2u]

The whole thing about RISC was the simplicity of instruction sets that makes it much easier to design in hardware and, thereby, easy to design hardware that was faster.

Modern x86 chips have pretty much circumvented all of the performance advantages of RISC with various methods. However, those methods took a lot of engineering effort and adds quite a bit of complexity and heat/power consumption. Until recently, this hadn't been a problem as big corporations like Intel could afford this extra design effort in order to maintain backwards compatibility. However, as we go forward and power becomes an issue, I think x86 will become less and less attractive.

 

[addragyn]

http://www-1.ibm.com/servers/eserver/pseries/hardware/system_perf.pdf

 

[unlockthesource]

That makes sense. Looks like it is the chip of the past and the chip of the future. Thanks

 

[cquark]

Modern IA32 chips are essentially superscalar RISC processors, with IA32 instruction translation units that convert x86 assembly into RISC micro-ops. When Intel first came out with this type of design with the Pentium, the translation unit and the microcode ROM took up a noticeable chunk of the die, which could've been used to increase performance for more execution units or cache. However, as we've moved from the 0.8 micron process the original Pentium was made on to today's 0.09 micron processes, the cost is fairly small and new tricks like the trace cache and new instructions to substitute for the abysmal x87 architecture in most respects have been added to mitigate the expense.

 

[CTho9305]

Originally posted by: cquark
Modern IA32 chips are essentially superscalar RISC processors, with IA32 instruction translation units that convert x86 assembly into RISC micro-ops. When Intel first came out with this type of design with the Pentium,

Pentium Pro, actually. The Pentium still ran native x86 ops.

the translation unit and the microcode ROM took up a noticeable chunk of the die, which could've been used to increase performance for more execution units or cache. However, as we've moved from the 0.8 micron process the original Pentium was made on to today's 0.09 micron processes, the cost is fairly small

I disagree. P4 die photo: the uROM isn't huge, but for comparison, it's the size of the floating point adder, almost the size of the data cache, about the size of the integer register file, and larger than most datapath execution units. If you didn't need it, you could save the array area, plus whatever extra logic there is to read from the uROM. Accessing the uROM also adds a cycle or two to the pipeline, which doesn't help your mispredict penalties at all.

and new tricks like the trace cache and new instructions to substitute for the abysmal x87 architecture in most respects have been added to mitigate the expense.

The trace cache is about half the size of the FPU, and almost the size of the whole integer execution core. The instruction decoder is nearly as big. Even with MIPS/VLIW, you'd still need some instruction decode logic, but you'd have a lot less area there, and you might be able to get away with no trache cache.

edit: Also, the P4 is a HUGE chip. The area wastes become more apparent when you're looking at simpler or lower-power designs.

 

[jhu]

Originally posted by: cquark
Modern IA32 chips are essentially superscalar RISC processors, with IA32 instruction translation units that convert x86 assembly into RISC micro-ops. When Intel first came out with this type of design with the Pentium, the translation unit and the microcode ROM took up a noticeable chunk of the die, which could've been used to increase performance for more execution units or cache. However, as we've moved from the 0.8 micron process the original Pentium was made on to today's 0.09 micron processes, the cost is fairly small and new tricks like the trace cache and new instructions to substitute for the abysmal x87 architecture in most respects have been added to mitigate the expense.

actually, intel wasn't the first to come out with this. nexgen did with their nexgen 5x86. it was pretty cool in that you could actually write programs in its native instruction set as well as x86(i think, or perhaps i'm thinking of some other processor).