Why do people keep comparing the X2 cores to 939

imported_whatever

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Jul 9, 2004
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Wouldn't they each have 1 channel of RAM, meaning they would be the same as the s754? Or do they somehow share bandwidth?
 

CheesePoofs

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Dec 5, 2004
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They share the bandwidth. The way the X2's are designed, there are two processing cores which have a bridge connecting them. Coming off of that bridge is the L2 cache, the memory controller, and the HyperTransport link, meaning the cores share all of those things.

ALso, the X2's are socket 939 chips ....
 

imported_michaelpatrick33

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Jun 19, 2004
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In other words a single threaded application (i.e. game) using one processor at 100% would get the full access to the memory if nothing else was running and using cpu cycles (other than normal antivirus etc.) just like in single core applications. With multi-tasking (and good use of priorities, sigh) the cpu(s) should dynamically allocate memory bandwidth to the programs that most need it. The reason the AMD solution works so well is the low latency of the integrated memory controller and crossbar technique. AMD's cpus aren't bandwidth starved to begin with hence the 5% boost in performance between equivalently clocked 754 and 939 parts. AMD is moving to 667 next year when latencies on DDR2 drop enough so the memory doesn't become a bottleneck as faster iterations come out (I can't remember if quad core was on the DDR2 667 roadmap or the DDR 3 roadmap.The Intel solution has to travel to the Northbridge and back for the cpus. I wonder if the next revision will have combined caches etc.
 

nitromullet

Diamond Member
Jan 7, 2004
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Originally posted by: CheesePoofs
They share the bandwidth. The way the X2's are designed, there are two processing cores which have a bridge connecting them. Coming off of that bridge is the L2 cache, the memory controller, and the HyperTransport link, meaning the cores share all of those things.

ALso, the X2's are socket 939 chips ....

Almost correct. Each core has its own L2 cache.

http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2397&p=2