Who do you think it is?

Discussion in 'CPUs and Overclocking' started by Phynaz, Jan 18, 2013.

  1. Phynaz

    Phynaz Diamond Member

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  2. ShintaiDK

    ShintaiDK Lifer

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    Intel :p

    D1X M1 and M2 plus Fab42 are directly constructed for 450mm.
     
  3. Idontcare

    Idontcare Elite Member

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    Given that this is specific to the litho in question - i.e. imprint litho - I would be quite surprised (make that very surprised) if this specific EETimes announcement is actually related to Intel.

    TSMC has been a proponent of imprint litho, as has Toshiba. Intel has invested billions into ensuring immersion litho and EUV are its future.

    That's not to say that Intel doesn't also have a fully functioning 450mm alpha-tool pilot line setup and running, just saying this particular EETimes article actually leaves me convinced they are not alone in that regard.
     
  4. ShintaiDK

    ShintaiDK Lifer

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    For half the industry, 450mm gonna be a bloody axe tho. But the sooner we get it the better on the long run.
     
  5. Idontcare

    Idontcare Elite Member

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    No question it will convert even more IDM's into fabless entities, to the benefit of the foundries.

    The cost savings all come at the expense of people losing their jobs though. This is not a growing industry in terms of job growth.

    More like a shell game where the same jobs disappear in one place only to re-appear elsewhere, only when they reappear there tends to be fewer of them.

    2001 was bloody, as was 2008. 2015 or 2016 is the next wave.
     
  6. Phynaz

    Phynaz Diamond Member

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    Thanks for the reply IDC, I was hoping you would give us your insight.
     
  7. Abwx

    Abwx Diamond Member

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  8. Idontcare

    Idontcare Elite Member

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    Toshiba, yeah that adds up. I'm glad to hear it too, litho is ripe for a disruptive technology, EUV is silly expensive and has taken a decade plus to even get to its currently unacceptable price-point. Imprint litho is not the golden solution, but at least it is disruptive enough to possibly kickstart something that will be.

    Moore's Law is one of economics, not physics and not technology. And conventional litho (including EUV) is killing the economics of continuing Moore's Law.
     
  9. Abwx

    Abwx Diamond Member

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    Perhaps almost good enough for products that have intrinsical
    high redundancy such that defect density is almost
    neutralized , the component of choice being ram chips.
     
  10. Soleron

    Soleron Senior member

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    The narrow scope of the actual business term disruptive is dead I see.
     
  11. Haserath

    Haserath Senior member

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    What makes EUV so expensive?
     
  12. Idontcare

    Idontcare Elite Member

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    http://www.youtube.com/watch?v=3pwvB4_Te8A

    http://www.eetimes.com/electronics-news/4210901/EUV-tool-costs-hit--120-million-

    EUV is expensive because there is a mountain of R&D expenses that have been invested into EUV and those expenses must be recaptured in the sale of the tools.

    Sell only 10 tools and they will cost you $500m each, sell 100 tools and they might only cost you $100m each.

    It is the exact same market economics at work which result in $2B stealth planes and so forth. The cost to produce the widget is not simply the production cost, you have to recapture the development cost.

    Which means the question is not "what makes EUV so expensive?"; rather, the question one really means to ask is "what makes EUV development so expensive?"

    And the answer to that comes down to the customer's requirements on the tool's capabilities. Wafer throughput, defectivity, lifetime reliability, etc.

    In other words, we are right back to the unavoidable consequences of the math that are captured by the Project Management Triangle.

    [​IMG]

    ^ you can pick any 2 of the 3, but no more than 2.

    The customers want all 3, naturally. But when asked to prioritize them they all insist on EUV being fast (competitive wafer throughput) and good (competitive defectivity, alignment, etc) and that means "cheap" is not happening at time-zero.

    Cheap will happen, as more tools are sold over time the price per unit will decrease as EUV tool makers (ASML) recapture a higher and higher percentage of their development costs.

    It is very similar to what makes the first few ten thousand 28nm wafers at TSMC cost $7k, but now a year later they only cost $2.5k.
     
  13. Haserath

    Haserath Senior member

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    Thanks IDC
     
  14. ShintaiDK

    ShintaiDK Lifer

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  15. Idontcare

    Idontcare Elite Member

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    Well then, looks like I was completely in the wrong about the prospects of the OP having something to do with Intel. That 450mm imprint litho tool could have very well been delivered to Intel after all :eek:
     
  16. ShintaiDK

    ShintaiDK Lifer

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  17. GreenChile

    GreenChile Member

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  18. cbn

    cbn Lifer

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    More info from the link:

    Sounds like a lot of detail is still under wraps.

    Hmmmm.....would be interesting to find out if the expansion of D1X has anything to do with Nano imprint?
     
  19. Idontcare

    Idontcare Elite Member

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    LOL, me too! I did a double-take on that until I realized it was the dude's shadow that was giving that appearance.
     
  20. cbn

    cbn Lifer

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    Yep, and it sure seems (at least by my understanding) that the power requirement for each node keeps increasing.

    So to get 60 wph at 7nm will take more power than 60 wph at 10nm.

    I keep looking for Press releases on the EUV power source development and haven't seen anything new.

    My guess is that in order for ASML/Cymer to convince Intel that EUV will be ready for 7nm some type of believable power scaling progression will need to be developed in order to hit the window at 7nm. (Last time I checked Cymer were at a sustainable 30 watts, but in order to get 7nm throughput at a decent speed they will need much more than that!)

    See ASML roadmap for example of how the power requirement scales:

    [​IMG]

    16nm at 180 wph needs 500 watts. This makes me wonder what 7nm will need?
     
  21. Idontcare

    Idontcare Elite Member

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    It is a rather disconcerting situation :(
     
  22. NostaSeronx

    NostaSeronx Golden Member

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    2000-2400 watts.
     
  23. cbn

    cbn Lifer

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    EUV update--

    http://optics.org/news/4/1/26

    Source power gets a bump to 40 watts from the stable 30 watts it was at Summer 2012 (see below) --> http://www.eetimes.com/electronics-news/4398770/ASML-and-Cymer-to-tackle-EUV-together

    Now if they can only get that 33% increase in stable power every six months....they would actually have a good amount of power by the time Intel's 7nm or 5nm node rolls around. :)
     
    #23 cbn, Jan 26, 2013
    Last edited: Jan 26, 2013
  24. Haserath

    Haserath Senior member

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    15mJ/cm^2

    So Haswell would receive around a whopping 30mJ per full die?

    Anybody know the current wafer throughput and wattage?
    For the same wph, wouldn't it only need around 1100-1200W? I don't really know if that's all that high really...
     
    #24 Haserath, Jan 26, 2013
    Last edited: Jan 26, 2013
  25. Haserath

    Haserath Senior member

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    Intel already needs something like quad patterning for 22nm. Wouldn't that take up more space than single patterning EUV?

    Thus more machines could equal more throughput.