By the way, could someone give a detailed explanation why the Athlon core performs better in RC5? I thought RC5 doesn't use the FPU? What kind of instructions are issued in cracking RC5?
Cause i thought that clock for clock, the PIII beat the Althon, unless the FPU was used?
There should be an explanation. For eg. It's my understanding that the G4 performs well in RC5 because it has more internal registers than the x86 class and thus the RC5 code can fit, eliminating the need for register renaming and the sorts. (This's my fuzzy grasp of the theory)