Which GPU for 14/16 nm pipecleaner?

[CluelessOne]

For AMD which GPU should act as a base for finfet process pipecleaner? I realize it has new design rule and stuff like that, but they need to start sonewhere familiar.

So what do you think is likely, updated pitcairn, updated tahiti, enhanced tonga or something else?

 

[ThatBuzzkiller]

A new high-end chip is what I'm thinking ...

AMD needs to desperately update a large part of their next line-up with a new micro-architecture on 28nm so that they can all have uniform features ...

I can only see AMD investing on 14nm for high performance products because only they will be able to cover extra design costs with a higher margin ...

I expect the die size to be about 400mm^2 ...

 

[jpiniero]

iphone 6s

 

[CluelessOne]

A new high-end chip is what I'm thinking ...

AMD needs to desperately update a large part of their next line-up with a new micro-architecture on 28nm so that they can all have uniform features ...

I can only see AMD investing on 14nm for high performance products because only they will be able to cover extra design costs with a higher margin ...

I expect the die size to be about 400mm^2 ...

For a new process node isn't that a little big?

 

[ThatBuzzkiller]

For a new process node isn't that a little big?

Yields will be far from ideal but it makes almost no sense to design lower performance desktop/notebook chips on 14nm when it can cost less to design that same chip on 28nm ...

For more advanced process nodes it's either go big or go home ...

Plus Samsung will have over a year to further experiment on their latest process node to suit it for larger silicon ...

 

[raghu78]

AMD's best products have always happened when they were built on a mature process or when there were pipecleaner products run before introducing a new flagship GPU with a significant architectural improvement.

HD 3870 - 55nm pipecleaner. die size and cost optimized shrink of HD 2900XT.

http://www.anandtech.com/show/2376

HD 4870 - 55nm GPU with architectural improvements

http://www.anandtech.com/show/2556

HD 4770 - 40nm pipecleaner. die size and cost optimized GPU.

http://www.anandtech.com/show/2756

HD 5870 - 40nm first DX11 flagship GPU.

http://www.anandtech.com/show/2841

AMD desperately needs a pipecleaner 14nm GPU product which is cost and die size optimized and which can sell for USD 150. imo AMD is the weakest at the low end where their products like Pitcairn and Bonaire are very old and just not competitive and lack the latest features. A new 14nm FINFET GPU with 1536 sp, 2 shader engines, 2 tesselation engines and 32-48 ROPs and a 128 -192 bit memory GDDR5 system with improved bandwidth efficiency (improved color compression) and a 150-170 sq mm die size is their first requirement. If AMD can bring significant microarchitectural improvements (GCN 2.0) with this GPU it would be ideal.

The yields on 16/14nm FINFET is very difficult on die sizes above 200 sq mm and thus I am guessing that both Nvidia and AMD will release smaller GPUs on FINFET before going for 300 sq mm GPUs. I do not expect a > 300 sq mm GPU by both AMD and Nvidia in 2016. The bigger die sizes will have to wait till H2 2017 and the process to mature and for yields to improve significantly.

 

[CluelessOne]

For a 150 - 170 mm2 gpu wouldn't that be about a shrinked Tonga size? Updated of course, not a straight port.

 

[raghu78]

For a 150 - 170 mm2 gpu wouldn't that be about a shrinked Tonga size? Updated of course, not a straight port.

A dumb shrink of Tonga would probably end up around 190 - 200 sq mm because I/O (memory controller, PCI-E ) don't shrink by the same ratio as logic. Thats why I mentioned a leaner chip which would cut the front end by half. We know Pitcairn with 1280 sp was very good with 2 shader engines. With some more front end efficiency improvements a 2 shader engine design should be enough to drive 1536 sp. What AMD needs more is to improve memory bandwidth efficiency. Nvidia is able to get away with 128 bit memory controller on GM206 aka GTX 960 and compete with Tonga aka R9 285/ R9 380 as their color compression and bandwidth efficiency is much better than AMD's design. AMD should try and get to a 128 bit memory controller with improved bandwidth efficiency for driving the small chip. If they get to 128 bit memory controller they can go sub 150 sq mm. If its 192 bit memory controller it will end up in the 150-170 sq mm range.

 

[Wall Street]

I would do A Tonga shrink with a 256 bit memory bus as a pipe cleaner. I could also see a Tonga with 2 HBM chips (vs the 4 in Fury) as a pipe cleaner if they want to do more HBM next gen. Should be smaller than a straight shrink if current Tonga dies really have a 384-bit bus. Also, this is about as slow as a 2016 GPU can afford to be to remain relevant to mainstream gamers.

 

[alcoholbob]

Remember, TSMC 16FF is 20nm metal with 16nm Finfets. It's not a "true" 16nm.

Which is why TSMC claiming 10nm is on time seems very skeptical. Because they also claim their 10nm is a full shrink of 10nm metal + 10nm Finfets. It's literally a double node shrink since their 16FF process is still using 20nm metal. It would be honestly surprising if 10nm TSMC is ready even by 2023.

 

[JDG1980]

A dumb shrink of Tonga would probably end up around 190 - 200 sq mm because I/O (memory controller, PCI-E) don't shrink by the same ratio as logic.

Don't forget that Tonga has six memory controller blocks (for a total 384-bit memory bus), even though all shipping products only have four of the six enabled (256-bit memory bus). Therefore, AMD could reduce the memory controller die space by one-third simply by removing unnecessary redundancies, even if no other changes were made. Given the degree to which Tonga seems to be a rushed, beta-class product, it wouldn't surprise me if there were other redundancies or "junk DNA" in the Tonga die as well.

Thats why I mentioned a leaner chip which would cut the front end by half. We know Pitcairn with 1280 sp was very good with 2 shader engines. With some more front end efficiency improvements a 2 shader engine design should be enough to drive 1536 sp. What AMD needs more is to improve memory bandwidth efficiency. Nvidia is able to get away with 128 bit memory controller on GM206 aka GTX 960 and compete with Tonga aka R9 285/ R9 380 as their color compression and bandwidth efficiency is much better than AMD's design. AMD should try and get to a 128 bit memory controller with improved bandwidth efficiency for driving the small chip. If they get to 128 bit memory controller they can go sub 150 sq mm. If its 192 bit memory controller it will end up in the 150-170 sq mm range.

AMD needs to improve its geometry performance substantially. They're getting kicked hard on tessellation-heavy titles.

Regarding memory bandwidth, it's not clear to what extent AMD's existing designs are bottlenecked by this, at least in real-world gaming. Has anyone tried adjusting the RAM clocks on a R9 285 to see how far they have to be lowered before it starts to hurt FPS?

 

[ThatBuzzkiller]

AMD needs to improve its geometry performance substantially. They're getting kicked hard on tessellation-heavy titles.

AMD has already improved it's geometry performance with Fiji ...

Tessellation heavy titles used to leave AMD GPUs in the dust but I don't think it's the case this time around since AMD is just as efficient as Nvidia when it comes to primitive throughput and high tessellation factors ...

Rasterizer for rasterizer and triangle set-up for triangle set-up, Fiji is about the same as GM200 with the only difference been that GM200 has 2 more of those units in comparison to the initial 4 that Fiji has ...

Synthetic benchmarks like Tessmark show that GM200 chips are only 50% faster than Fiji and that follows inline with the fact that the latter has 33% less rasterizers/set-up units so this seems good outlook efficiency wise. More real world benchmarks like Unigine Heaven and The Witcher 3 shows AMD putting up a good fight on the tessellation front with Fiji and maybe Tonga ...

I honestly thought Nvidia's polymorph engine would be the more scalable solution of the two IHVs, show more gains overtime leaving their competitor behind the curve, and that AMD would adopt a fairly similar technology but it appears that none of these were the case ...

I don't know how AMD has managed to get the same rasterizer and triangle set-up efficiency as Nvidia did with Maxwell but you have to give props to them when a lot of people doubted their approach to a centralized processing system of primitives ...

 

[NTMBK]

My guess would be a high efficiency mobile oriented part, with a die size somewhere near that of Bonaire or Cape Verde. On an interposer, with a pair of HBM2 stacks.