Whats the difference x86 and the IBM PowerPC chips

crazyeddie

Senior member
Dec 23, 2004
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An overview of Risc vs. Cisc architecture

x86 microprocessors are built around Complex instruction set computer architecture (Cisc) where the PowerPC chips are built around Risc (Reduced instruction set computer) architecture.

Not only are the memory and bus interfaces completely different, but the machine level programability is vastly different.

The article I provided the link to will go into much more detail, but I can sum up the difference pretty quickly:

Risc processors can do a few things extremely fast
Cisc processors can do a lot of different things pretty fast

Hope this helps.
 

Bassyhead

Diamond Member
Nov 19, 2001
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They are two very different ISAs (instruction set architectures). They were both developed by different companies with different design philosophies and different goals in mind. While x86 did start off being a CISC machine, they nowadays interpret CISC instructions into many smaller microinstructions similar to RISC. Typically most CPUs today have mixed concepts from both RISC and CISC arenas so the names don't mean much any more. I think the G4 actually has more instructions than the P4. The two links below are very good articles about comparisons on the architectural level.


http://arstechnica.com/articles/paedia/cpu/p4andg4e.ars/1

http://www.osnews.com/story.php?news_id=3997&page=1
 

jhu

Lifer
Oct 10, 1999
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Originally posted by: crazyeddie
An overview of Risc vs. Cisc architecture

x86 microprocessors are built around Complex instruction set computer architecture (Cisc) where the PowerPC chips are built around Risc (Reduced instruction set computer) architecture.

Not only are the memory and bus interfaces completely different, but the machine level programability is vastly different.

The article I provided the link to will go into much more detail, but I can sum up the difference pretty quickly:

Risc processors can do a few things extremely fast
Cisc processors can do a lot of different things pretty fast

Hope this helps.

actually, that no longer applies to the processors we have now.
 

ribbon13

Diamond Member
Feb 1, 2005
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I think it would be cool to have a chipset than would allow a G5/PPC970 to use a Hypertransport link so you could have a machine with 1 Opteron and 1 G5. I wonder how easy it would be to compile linux to handle that?
 

jhu

Lifer
Oct 10, 1999
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Originally posted by: ribbon13
I think it would be cool to have a chipset than would allow a G5/PPC970 to use a Hypertransport link so you could have a machine with 1 Opteron and 1 G5. I wonder how easy it would be to compile linux to handle that?

you can do that with a single-board-computer-on-a-pci-card. just put the sbcoapc and you're good to go.
 

ribbon13

Diamond Member
Feb 1, 2005
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I'm well aware of that. I was more dreaming of a chipset that would allow an Opteron and a G5 to run in SMP on a common PCB.
 

ribbon13

Diamond Member
Feb 1, 2005
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Damnable bitness!

Why not have a realtime endian switch IC?... that could be damn complex though.

LIke I said... its a pipe dream.
 

complacent

Banned
Dec 22, 2004
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Why would you want an opetron and a G5? Wouldn't you just be better off with 2 of each? (rhetorical question) Someone, please give a compelling reason.