Whats the bandwidth limit for 32bit and 64bit PCI bus?

[soulm4tter]

i fergot :Q

 

[HigherGround]

PCI bus is speced at 33.33Mhz ... for 32bit data bus ( 4 bytes every clock cycle ) that translates to about 132MB/sec, twice as much for the 64bit bus.

 

[Rand]

There are also 66MHz PCI slots, though you seldom see 66MHz PCI outside of the high end server market.

 

[ucla88]

32bit 33 mhz as noted theoretical max 133MB/s
64 bit 33 mhz, 266MB/s
64 bit 66 mhz, 512MB/s

guess what
32bit 66mhz, also 266MB/s (hey, i didn't even know these existed, but promise makes a 4 channel ata raid controller that is 32bit, 66mhz for mb's that will support it.

practically speaking, i think the peak bandwidth across a 32 bit, 33mhz pci is around 120's

 

[sMashPiranha]

I think in reality, from an Intel test I read about, the 32bit maxes out around 80MBps. It may be higher than that by now though, that was quite a while ago.

 

[Apex]

<< I think in reality, from an Intel test I read about, the 32bit maxes out around 80MBps. It may be higher than that by now though, that was quite a while ago. >>



They actually max out above that, somewhere in the 120mbps range. I have 3 X15 drives (15,000rpm) in a RAID0, and can do above a sustained 100mbps (with peak above that, of course). People with 4 X15's or newer X15-36LP's tend to do above this.

 

[Rand]

<<

<< I think in reality, from an Intel test I read about, the 32bit maxes out around 80MBps. It may be higher than that by now though, that was quite a while ago. >>



They actually max out above that, somewhere in the 120mbps range. I have 3 X15 drives (15,000rpm) in a RAID0, and can do above a sustained 100mbps (with peak above that, of course). People with 4 X15's or newer X15-36LP's tend to do above this. >>



There is no consistently correct answer. The PCI implementation is going to vary in ever chipset... in some cases the real world limits may well be 80MB/s in others it can hit 120MB/s.
In can also vary depending upon what specific devices are using the majority of the bandwidth available through the PCI bus. and how those devices demand it's allocation.