Originally posted by: coinz
I thought that for the ram to be running the same speed as the fsb it had to be at the 1T setting in the bios (1:1) and 2T(5:6). I now from what i've have been reading that this is wrong and that it is when you change the speed of the ram it's the divider thing... 400 mhz being 1:1 and the 333mhz being 5:6...Can someone please explain this to me....
thanks
DRAM Command Rate is synonymous for address and commmand decode latency of the chipset. Briefly, behind this parameter is the selection of the proper physical bank within the entire memory space in any given system. Any DIMM can have two physical banks and only one bank can be accessed at any time. The choice of which bank is opened requires decoding of the address. In a scenario where only one single-sided DIMM is present in the system, the choice is the default since there are no other possibilities.
If a double-sided DIMM is used instead, the controller has to make an intelligent choice with respect to the issueing of the so-called chip select (CS) command to select the correct bank within which the information is stored. In case, there are two double-sided DIMMs in the system, there are four possible choices and only one is correct. Decoding a larger memory space will take more time and that is why most chipsets currently offer a variable CMD rate where the choices are 1T or 2T.
Since the command sequence (Bank Activate, Read) is issued in a fixed timing sequence, this additional latency applies only for the initial access, whereas all subsequent commands are queued according to the latencies set in the BIOS. Therefore the CMD latency only affects random accesses or the time until the first word is output (tRAC). Streaming memory accesses, especially with prefetching enabled are hardly affected.
From:
LostCircuits BIOS Guide
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