whats keeping people from putting ram directly on a die?

kcthomas

Senior member
Aug 23, 2004
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i read part of the cell processing thread that stated that over 80% of a CPU's time is accessing RAM. This is a guess but is CPU to RAM slow because of interconnect? If this is true, whats keeping people from putting RAM on the same die as a CPU? Im not talking about large amounts of cache, im just saying if you take the RAM that say micron makes and just put it on the same die as the CPU.
 

Matthias99

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Oct 7, 2003
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You *could*, but consider that something like ~70% of a P4EE's die is cache SRAM -- and that's 2MB worth. Putting any sizeable amount of fast SRAM on-die would make the CPU die unreasonably large, killing yields and putting prices through the roof.

CPU-to-RAM interconnect is slow because DRAM is slow -- 400Mhz versus 3000+Mhz that the CPU is running at, plus it takes a few RAM clock cycles to start up a new access. Putting, say, 128MB of 400Mhz DRAM on-die might be feasable, but wouldn't help performance *that* much.
 

Bassyhead

Diamond Member
Nov 19, 2001
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Matthias is correct. There's good reasons why the P4EE costs like more than double an identical P4 without the extra cache costs. DRAM is cheaper but slow and the CPU wastes lots of cycles anyways waiting for the main RAM.
 

Cattlegod

Diamond Member
May 22, 2001
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You won't see a huge performance increase anyway. The amount of cache you use is ideal considering each ram access has about a 90% chance it will access something that is already on the cache rather than grabbing some new info from ram.

AND, even if it was cheap to do, you would need a cache for the ram on the die because the more cache you have the slower it operates, and you just end up with just about the same (or worse if you have no cache for the ram on the die) performance as we have today.
 

Gannon

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Jul 29, 2004
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Actually bigger on-chip cache has real advantages for game applications. Right now cache and memory is at a premium on consoles, especially the PS2. Certain things just can't be done effectively with small cache sizes. There's a delicate balance between size of cache and the speed of it. The more memory you add to the die the more you're going to lose in managing that complexity. I heard something like 40-50% of all transistors in a P4 are management and control logic. Thats pretty significant if you think about it.