• We’re currently investigating an issue related to the forum theme and styling that is impacting page layout and visual formatting. The problem has been identified, and we are actively working on a resolution. There is no impact to user data or functionality, this is strictly a front-end display issue. We’ll post an update once the fix has been deployed. Thanks for your patience while we get this sorted.

What is the pre-boot memory paradigm like for modern x86 boards?

chrstrbrts

Senior member
Hello,

OK, so my question is pretty self-explanatory.

Prior to the OS being booted and the paging schemes used there, how does the processor see the memory space while the BIOS is POSTing and setting configuration registers in peripherals?

Thanks, guys.
 
Prior to the OS being booted and the paging schemes used there, how does the processor see the memory space while the BIOS is POSTing and setting configuration registers in peripherals?
Search for bootstrapping the CPU and core logic. Intel IA-32 (and AMD equivalent) programming and software developer guides should have what you want.

From a developer's perspective, some of this stuff is not well known because some aspects are proprietary design internal to the CPU and core logic that a developer doesn't have any control over anyhow. IOW, the board designer/manufacturer need only make sure that particular pins of the CPU always get wired to particular pins on the core logic, and a particular range of physical addresses will be hard wired or mapped (i.e. it just works). See:

https://en.wikipedia.org/wiki/Reset_vector

http://www.drdobbs.com/parallel/booting-an-intel-architecture-system-par/232300699

https://www.cs.cmu.edu/~410/doc/minimal_boot.pdf
 
Back
Top