What is the difference between the processor instructions "ZEN + or ZEN2 "

[BHZ-GTR]

Hi Friends

How does the instructions affect processors and how much they increase performance .

Do the instructions affect the new generation " ZEN 2 ".

Thank You.

 

[DrMrLordX]

Um

Are you asking what new instructions are supported by Zen2?

If that's what you're asking, then near as I can tell . . . none. Technically. Zen2 will be much faster running AVX2 thanks to the introduction of 256-bit FMACs. But Zen+ (and Zen) have support for AVX2, albeit at half normal speed.

 

[Hans Gruber]

Don't forget that Zen2 runs faster. 4.4ghz+

 

[DrMrLordX]

Don't forget that Zen2 runs faster. 4.4ghz+

Also true. In this respect, Zen2 should execute instructions more quickly by dint of higher clockspeeds.

 

[ThatBuzzkiller]

2nd generation Zen architecture features 3 new instructions so far according to GCC Compiler patches ...

- Cache Line Write Back (CLWB)
- Read Processor ID (RDPID)
- Write Back and Do Not Invalidate Cache (WBNOINVD)

There may yet be more to be revealed at launch ...

 

[DrMrLordX]

There's your answer @BHZ-GTR - at least three new instructions.

 

[Keljian]

New instructions like these won’t add much to performance.

 

[BHZ-GTR]

Are the instructions ineffective? So how much do they affect .

 

[DrMrLordX]

Read Processor ID probably won't change anything. Not quite sure on the other two.

 

[Kedas]

I think they are mostly related with security so that next time there is a security bug they can fix it with a much smaller speed penalty than if they wouldn't have these.