7.1.8.3 Voltage Identification (VID)
The Voltage Identification (VID) specification for the VCC, VSA, and optionally the VCCD voltage are defined by the VR12/IMVP7 Pulse Width Modulation (PWM) Specification. The reference voltage or the VID setting is set using the SVID communication bus between the processor and the voltage regulator controller chip. The VID setting is the
nominal voltage to be delivered to the processor VCC, VSA, and the VCCD lands.
Table 7-3 specifies the reference voltage level corresponding to the VID value transmitted over serial VID. The VID codes will change due to temperature and/or current load changes to minimize the power and to maximize the performance of the part. The specifications are set so that a voltage regulator can operate with all supported frequencies.
Individual processor VID values may be calibrated during manufacturing such that two processor units with the same core frequency may have different default VID settings.
The processor uses voltage identification signals to support automatic selection of VCC, VSA, and if desired the VCCD power supply voltages. If the processor socket is empty (SKTOCC_N high), or a “not supported” response is received from the SVID bus, then the voltage regulation circuit cannot supply the voltage that is requested, the voltage regulator must disable itself or not power on. Vout MAX register (30h) is programmed by the processor to set the maximum supported VID code and if the programmed VID code is higher than the VID supported by the VR, then VR will respond with a “not supported” acknowledgement.