What effect do you think Intel/Micron 3DXpoint DIMMs will have on software development?

cbn

Lifer
Mar 27, 2009
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On the server level?

On the client level?

One effect, of course, will be a higher amount of memory per dollar than we are normally used to seeing in servers, but also (most likely) a higher absolute amount of memory as well.
 
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cbn

Lifer
Mar 27, 2009
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Two in memory applications I am interested in:

Blender and R Programming language.
 

cbn

Lifer
Mar 27, 2009
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As a reference point here is the current on demand pricing for Amazon EC2:

https://aws.amazon.com/ec2/pricing/on-demand/

Scrolling down to "memory optimized" there are several options. The following is Linux with US East (Ohio) as the region:

Memory Optimized - Current Generation
x1.16xlarge 64 174.5 976 1 x 1920 SSD $6.669 per Hour
x1.32xlarge 128 349 1952 2 x 1920 SSD $13.338 per Hour
r3.large 2 6.5 15 1 x 32 SSD $0.166 per Hour
r3.xlarge 4 13 30.5 1 x 80 SSD $0.333 per Hour
r3.2xlarge 8 26 61 1 x 160 SSD $0.665 per Hour
r3.4xlarge 16 52 122 1 x 320 SSD $1.33 per Hour
r3.8xlarge 32 104 244 2 x 320 SSD $2.66 per Hour
r4.large 2 7 15.25 EBS Only $0.133 per Hour
r4.xlarge 4 13.5 30.5 EBS Only $0.266 per Hour
r4.2xlarge 8 27 61 EBS Only $0.532 per Hour
r4.4xlarge 16 53 122 EBS Only $1.064 per Hour
r4.8xlarge 32 99 244 EBS Only $2.128 per Hour
r4.16xlarge 64 195 488 EBS Only $4.256 per Hour

NOTE: These can also be had in reserved and spot instances (both of which are priced lower).

I bring this up now because eventually I will to compare to Amazon EC2 memory optimized instances using 3DXpoint DIMMs.
 
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cbn

Lifer
Mar 27, 2009
12,968
221
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Thinking about this more today, here is a scenario I am wondering will pan out:

1. 3DXpoint DIMMs first appear on server. (This is the direction we know of so far).
2. 3DXpoint (at some die size) begins to be used stacked on package with CPU chiplets for Intel Servers using EMIB. (as well as AMD Server).
3. These same CPU chiplets (with stacked 3DXpoint on package) begin to be used as building blocks for consumer processors. (Eg, low power quad core notebook chips)
4. 3DXpoint (low bin) begins to be used for IoT processors.
5. 3DXpoint DIMMs begin to be used on consumer desktops.
 
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cbn

Lifer
Mar 27, 2009
12,968
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Some info I got from the link in this post.

http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=/netahtml/PTO/srchnum.html&r=1&f=G&l=50&s1="20160276022".PGNR.&OS=DN/20160276022&RS=DN/20160276022


Some embodiments include architectures in which two or more memory array decks are vertically stacked. One or more of the stacked decks is configured to have different operational characteristics relative to others of the stacked decks. For instance, one or more of the decks may be configured to have rapid access times suitable for utilization in XIP (execute in place) applications and/or dynamic random access memory (DRAM) emulation applications, and one or more others of the decks may be configured to have stabile, possibly slower access, storage suitable for utilization in long-term storage applications. Further, one or more of the decks may be configured to have more endurance than others of the decks. For instance, one or more of the decks may be suitable for a lifetime of approximately 100,000 cycles, whereas one or more others of the decks may be suitable for about 1,000,000 cycles (in other words, at least one of the decks may have a durability of at least about 10-fold more cycling times than another of the decks). The difference between the endurance of the decks may result from structural differences between the decks. For instance, a deck with higher endurance may have reduced thermal disturb and/or other memory-loss mechanisms as compared to a deck with less endurance. However, the deck with less endurance may have other advantages (for instance, faster access times, etc.) as compared to the deck with higher endurance. Accordingly, each memory array deck may be tailored for applicability relative to specific memory functions.

So a high endurance layer design has slower access time. In contrast, the low endurance layer design has faster access time.

So how would Intel/Micron use this to their advantage? Read cache (using the low endurance layer)?
 
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cbn

Lifer
Mar 27, 2009
12,968
221
106
Thinking about this more today, here is a scenario I am wondering will pan out:

1. 3DXpoint DIMMs first appear on server. (This is the direction we know of so far).
2. 3DXpoint (at some die size) begins to be used stacked on package with CPU chiplets for Intel Servers using EMIB. (as well as AMD Server).
3. These same CPU chiplets (with stacked 3DXpoint on package) begin to be used as building blocks for consumer processors. (Eg, low power quad core notebook chips)
4. 3DXpoint (low bin) begins to be used for IoT processors.
5. 3DXpoint DIMMs begin to be used on consumer desktops.

Looking at the above, I am thinking 3DXpoint DIMMs might come to desktops sooner than I have listed if they can be used alongside DRAM based DIMMs. (re: I think some people will want and like to use the highest frequency and lowest latency DIMMs with the existing and legacy programs. This with two or more (depending on the platform) 3DXpoint DIMMs for very fast storage)
 
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cbn

Lifer
Mar 27, 2009
12,968
221
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The above video "Hype to Reality, a Panel Discussion with Leaders of Real World Persistent Memory Applications" had a lot of great info.

Moderator:
Jack Vargas, Product Marketing Manager, Intel Corporation

Panel:
Scott Miller, Senior Technologist, DreamWorks Animation
Nikita Ivanov, Founder & CTO GridGain Systems
Kodi Umamageswaran, Vice President of Development, Exadata Storage Server and Database Machine, Oracle
Brian Bulkowski, Founder and Chief Technology Officer, Aerospike

Some interesting parts (will add more notes later on):

3:56 Scott Miller (of Dreamworks) talks about moving persistent memory closer to the end user.

5:47 Scott Miller (of Dreamworks) wants to federate the 3DXpoint DIMMs across the enterprise which he describes as sort of a fabric vision but with end user workstations rather than data center gear.

19:37 A Question was posed to Scott (of Dreamworks) about how persistent memory could change (animated) movie workflows. His answer was he wanted to do something called "Sequence based or whole film based development" rather than working on individual shots (about 80 frames) within each workstation. This would take 200TB, 300TB or 500TB of federated persistent memory spread across many machines to hold all the assets (and drive work) to work on the whole movie at the same time.

36:47 Scott Miller (of Dreamworks) mentioned designing APIs around in memory data structures rather than for filesystems.

38:08: A question was asked about what could be a potential turnoff to adoption of the DIMMs. Data Center first (or data center only) rather than Cloud first (eg, AWS) was the sentiment of three of the four panelists. At 45:05 Scott Miller of DreamWorks further stressed the importance of Cloud availability for testing.



 
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