It is the Si wafer thickness that makes the tbird (or any for that matter) die appear so "thick" or "tall."
The actual thickness of the circuitry is very thin (tens of microns). An analogy for you is if you consider the wafer substrate to be a ten story building then the top six inches of the roof of that building represent the entire circuitry (transistors and up). Standard 200mm Si wafers are ~750 micron thick. If you make them thinner you risk them fracturing more easily inside your fab equipment (vacuum chucks, spin dryers, general handling etc.).
BTW, the 3D chip concept is intersting but what they are not mentioning is the massive cooling requirements if you were to implement this concept into a logic SC such as the tbird, memory runs slower and thus inherently cooler so the current app. is ok.
-Phil