What are a processor's registers initialized to upon power up / reset?

[chrstrbrts]

Hi,

So, upon power-on, the IP register initializes to FFFF:FFF0 to execute code stored on a BIOS EEPROM.

But, what about AX, BX, etc. ?

What do they initialize to upon power-on or reset?

Is it just random, quantum derived voltage configurations?

Thanks.

 

[Ken g6]

Is it just random, quantum derived voltage configurations?

Probably. But why does it matter? Unless you're writing your own custom BIOS you'll never see those values.

I don't think any other registers even need to be initialized, except maybe for the flags register. All the others you can set with code.

 

[chrstrbrts]

Probably. But why does it matter?

I'm an inquisitive fellow.

Unless you're writing your own custom BIOS...

One day, Ken.....one day.

I don't think any other registers even need to be initialized, except maybe for the flags register. All the others you can set with code.

OK, thanks.

 

[GammaLaser]

Here's some information from http://www.logix.cz/michal/doc/i386/chp10-01.htm regarding the 386:

10.1 Processor State After Reset

The contents of EAX depend upon the results of the power-up self test. The self-test may be requested externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty. If the self-test is not requested, the contents of EAX after RESET is undefined.

DX holds a component identifier and revision number after RESET as Figure 10-1 illustrates. DH contains 3, which indicates an 80386 component. DL contains a unique identifier of the revision level.

Control register zero (CR0) contains the values shown in Figure 10-2. The ET bit of CR0 is set if an 80387 is present in the configuration (according to the state of the ERROR# pin after RESET). If ET is reset, the configuration either contains an 80287 or does not contain a coprocessor. A software test is required to distinguish between these latter two possibilities.
The remaining registers and flags are set as follows:

EFLAGS =00000002H

IP =0000FFF0H

CS selector =000H

DS selector =0000H

ES selector =0000H

SS selector =0000H

FS selector =0000H

GS selector =0000H

IDTR:

base =0

limit =03FFH

All registers not mentioned above are undefined. These settings imply that the processor begins in real-address mode with interrupts disabled.