VHDL Experts: How do I debug my processor?

[jmcoreymv]

I designed an 8-bit general purpose microprocessor in VHDL (it's going to be implemented on a spartan 2e). Is there any way for me to debug this processor code before synthesizing it onto the chip?

 

[TuxDave]

Originally posted by: jmcoreymv
I designed an 8-bit general purpose microprocessor in VHDL (it's going to be implemented on a spartan 2e). Is there any way for me to debug this processor code before synthesizing it onto the chip?

Aren't you supposed to debug part by part and not test the entire thing all at once?

 

[jmcoreymv]

Unfortunately, because of the layout of this processor, it's pretty much all in one large vhdl file....

 

[TuxDave]

Geez that sucks...

 

[jmcoreymv]

Yea well...any ideas?

My friend is writing an assembler for it. So the plan right now is to wait until thats done and then write a simple program and pray that it works the first time.

 

[jmcoreymv]

^

 

[TerryMathews]

Originally posted by: jmcoreymv
I designed an 8-bit general purpose microprocessor in VHDL (it's going to be implemented on a spartan 2e). Is there any way for me to debug this processor code before synthesizing it onto the chip?

Yeah, the fact that you didn't utilize hierarchial design means you're going to have to test every possible instruction for all of the relevant status conditions (Probably VNCZ), to ensure full and proper functionality.

You == Owned. Why didn't you design each individual component in VHDL and test individually? Much, much easier that way. Most VHDL assemblers have the ability to link several designs together.

 

[jmcoreymv]

Normally I use heirarchical design but for some reason it just seemed much easier to use a massive block. I still separated out the instruction memory, data memory, clock divider, and a functions package into separate files. Ive tested about half the functions so far and they seem to work.

The only problem is that I've been creating instructions by hand rather than writing assembly and having an assembler create the binary file. Anyone interested in helping create a simple assembler (language of your choice)?

 

[blahblah99]

Originally posted by: jmcoreymv
Unfortunately, because of the layout of this processor, it's pretty much all in one large vhdl file....

Haha, you're out of luck then. Debugging it is going to be a HUGE PITA with all the modules in one large file.

Anyhoo, for debugging and simulations, I use Modelsim XE. It does a fairly accurate simulation.

 

[jmcoreymv]

Im using the free version of ModelSim. I used to think it was okay but over the summer I was using the simulator in ActiveHDL by Aldec and that program is 100x better than Xilinxs. Now im back on modelsim and I hate it.