NVIDIA GOFORCE 3D TECHNOLOGY
Complete setup and pixel processing in hardware
Programmable pixel shader
Transform engine
Multiple texture support
Intelligent power management
OpenGL® ES/MD3D-compliant
128-bit memory interface
40-bit color pipeline
Signed overbright color
8 surfaces (color, Z, 6 simultaneous textures)
Sixteen 4-bit or one 8-bit palette
Bilinear/trilinear texture filtering
Fixed and floating point data
HVGA support in 3D mode
MPEG-4/H.263 HARDWARE CODEC
MPEG-4 encode or decode: VGA @ 30fps1
Full-duplex MPEG-4: CIF @ 30fps
H.263 hardware codec
Encoding of rotated video
Post-video processing, including hardware color space conversion and image scaling
De-blocking and de-ringing filters to enhance the image quality during playback
JPEG HARDWARE CODEC WITH NVIDIA FOTOPACK TECHNOLOGY
Preview of 3MP image at 10fps or 2MP images at 15fps
FotoPack technology1
Motion JPEG capture/playback for VGA resolution at up to 30fps
4:2:2 JPEG encode/decode support
Composite, framing, and overlay
Thumbnail support (store both image and thumbnail in same file)
Programmable Q-table
HIGH-RESOLUTION COLOR DISPLAY
Support for VGA (640 x 480) LCD1
Double-buffering support on HVGA
Dual LCD support
Hardware support for sub-LCD display
18-bpp panel support with 262K colors
SD/SDIO HOST CONTROLLER
1-bit and 4-bit SD/SDIO and mini-SD
Support for storage or Bluetooth cards
VIDEO INPUT
3MP camera module support
ITU-R 656-compliant 8-bit interface
Horizontal scaling with horizontal averaging and low-pass filtering
Vertical averaging
Serial peripheral bus for camera control and programming
YUV422 to RGB888 or RGB565 color space conversion
Single- and double-buffering support
Double-buffering synchronization with graphics controller
Fine-grained digital zoom, up to 8X
64-BIT 2D GRAPHICS ACCELERATION
BitBLT with 256 three-operand raster operations
Mono and solid pattern
Mono-to-color expansion
Mono source/pattern transparency
Destination read/write color transparency
All angle (Bresenham) line draw
Rectangle fill
FLAT PANEL (LCD) INTERFACE
Direct interface to LCD drivers with embedded memory
Built-in timing generator
Color FRC S-STN at 4, 8, and 16 bits/clock
Color PWM S-STN at 9 and 12 bits/clock
Color TFT at 9, 12, 16, and 18 bits/clock
Partial pixel-per-clock mode
Up to 16-level FRC and up to 4-bit spatial dithering
CPU, RGB, Serial, NEC M-CMADS, AMLCD, LTPS, and Sharp ULC display support
Support for over 80 popular LCDs
GRAPHICS CONTROLLER
Advanced compositing with two independent surfaces for blend, overlay, and transparency
Hardware rotation (90°, 180°, 270°)
Flip and mirror
Partial display support (any size/position)
Triple 6-bit lookup table (LUT)
Encode predefined region of display
INTEGRATED 1280KB 128-BIT SRAM
1280KB of 128-bit-wide onboard frame, video, and transaction buffers minimize external bus traffic and significantly reduce system power
32-BIT FLEXIBLE HOST BUS INTERFACE
Indirect and direct addressing support
8/16/32-bit asynchronous interface for baseband processors (ARM based)
Burst mode support
Fixed and variable latency host bus
CLOCK OPTIONS
On-chip oscillator for 2MHz to 13MHz crystals
Digital bypass mode for external clock sources (e.g. baseband or CPU)
Low-power relaxation oscillator (10MHz to 25MHz +/- 20%)
On-chip PLL with VCO range of 20MHz to 200MHz
NPOWER - ADVANCED POWER MANAGEMENT
Fully static CMOS technology
Programmable drive strength and slew rate
Low-power 0.13µ process
Individual module enables automatic shut-off of unused pipeline stages
PACKAGING AND POWER
168-pin BGA, 10 x 12mm, 0.65mm ball spacing, 1.2mm height1
JTAG boundary scan
1.425V to 1.575V core, 1.71V to 3.60V I/O
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