Vega/Navi Rumors (Updated)

[Sweepr]

When we have pretty solid information that points to Vega being a new architecture I'm not sure why I'm reading posts bashing Polaris 10's power efficiency. Tons of people on reddit have it properly undervolted as it should have been from the start and it matches 1060 in power efficiency for the most part.

Fortunately this feature is not exclusive to Polaris 10, as you can also undervolt a GTX 1060 with good results:

http://media.bestofmicro.com/E/P/595393/original/Performance-vs.-Power-Consumption.png

>80% the stock performance at 60W.

 

[krumme]

When we have pretty solid information that points to Vega being a new architecture I'm not sure why I'm reading posts bashing Polaris 10's power efficiency. Tons of people on reddit have it properly undervolted as it should have been from the start and it matches 1060 in power efficiency for the most part.

It seems to me polaris was factory overvolted to keep yields high. Not to improve f max. To compensate for process variation. But it doesnt explain why it seems 9260 p10 can go to 1400MHz.

Perhaps its a new metal layer stepping? Can it be done in 3 months?

http://www.anandtech.com/show/10710/amd-announces-embedded-radeon-e9260-e9550

 

[Piroko]

Tesla P4. GP104 drawing 36W and only 20W for the rest of the board - including 8GB GDDR5...

...which only runs at 6GHz in 75W configuration and probably even slower in 50W configuration. 37W for 8GHz @ 256 bit bus doesn't sound too far off.

edit: also, that card has no display output. "The rest of the board" minus GPU VRMs is memory.

 

[gamervivek]

Given current die size and perf/w characteristics, small Vega will need to be ~375mm2 and ~240 watts in game to keep up with the 1080. If small Vega is using HBM, then power requirements would drop by 15 watts or so.

AMD's claims of P10's efficiency improvements leading up to release was nowhere close to reality. AMD demonstrated only minimal perf/w gains throughout the entire 28nm process with each GCN iteration. Any improvements Vega will have in perf/w outside of HBM use will be (more than likely) minimal.

The new rumors from VC and Fudzilla put big Vega with Fiji like specs and on which my reply was based on. 12 TFLOPs for Vega10 in professional market which should be around 13-14TFLOPs for the desktop version, enough to easily outdo the 1080. Vega11 is said to be the smaller chip.

How big Vega10 would be would depend on whether AMD go for a Hawaii or a Tahiti compared to Polaris 10's Pitcairn.

 

[Krteq]

Nowhere near this number - and 4GB vs 8GB RX 480 reviews show this:

Well, it still has the same number of GDDR5 chips (8x 8Gb chips = 8GB or 8x 4Gb chips = 4GB) with almost the same power consumptions - Vdd/Vddq is still the same, hence the same power consumption.

 

[Det0x]

The new rumors from VC and Fudzilla put big Vega with Fiji like specs and on which my reply was based on. 12 TFLOPs for Vega10 in professional market which should be around 13-14TFLOPs for the desktop version, enough to easily outdo the 1080. Vega11 is said to be the smaller chip.

Where is it said that it will be the smaller chip, other then the select few on this forum which keeps repeating it over and over again ?

I have already been over this back at page 5 in this thread, post #116.

Vega10 will be a multi-chip module, and feature HBM2 memory. The 14 nm architecture will feature higher performance/Watt than even the upcoming "Polaris" architecture. "Vega10" isn't a successor to "Fiji," though. That honor is reserved for "Vega11." It is speculated that Vega10 will feature 4096 stream processors, and will power graphics cards that compete with the GTX 1080 and GTX 1070. Vega11, on the other hand, is expected to feature 6144 stream processors, and could take on the bigger GP100-based SKUs. Both Vega10 and Vega11 will feature 4096-bit HBM2 memory interfaces, but could differ in standard memory sizes (think 8 GB vs. 16 GB).

The Vega 10 GPU is rumored to be a smaller chip with up to 4096 Stream Processors and this is the chip that AMD needs in order to compete with Nvidia's new GP104 GPU and Geforce GTX 1080/1070 graphics cards. The Vega 11, is a bigger chip, rumored to come with up to 6144 Stream Processors and compete with Nvidia's future GP100 flagship graphics card.

http://www.fudzilla.com/news/graphics/40662-amd-allegedly-pulls-vega-launch-forward

Vega11 - lets call it "Big Vega' which is to replace the FIJI / Fury (X) parts. So as suggested, where Vega10 would get 4096 stream processors and could compete with the GeForce GTX 1080 and GTX 1070 Vega11 on its end would feature 6144 stream processors (=rumor) and would be lined against the GP100/GP102 aka Big Pascal GPU (Titan X). This all is obviously known and discussed many times already. Then there now is some new and intersting info.

http://www.guru3d.com/news-story/amd-vega-10-vega-20-and-vega-11-gpus-mentioned-by-cto.html

AMD Vega 11 Also Arriving Next Year
There's very few information we know of about AMD Vega 11. However, one thing stands out is that AMD's Vega 11 is reportedly going head-to-head against NVIDIA's reported GP100, which is said to be even more powerful than the GTX 1080 and Titan X.

Another important thing to note is that if Vega 10 is twice as powerful as Polaris 10's Radeon RX 480, Vega 11 is rumored to be thrice as powerful compared to RX 480. Based on the available data, it will reportedly have a 32GB HBM2 memory and with 1TB per second memory bandwidth.

Another rumor about Vega 10/11 is that it will have up to 18 billion transistors, which can dramatically increase the graphic card's performance and efficiency. It is worth noting that GTX 1080 only has 7.2 billion, while Titan X has 12 billion transistors.

http://www.isportstimes.com/article...a-10-release-date-h1-2017-vega-11-q4-2017.htm

And the list goes on and on..

Despite 11 being a larger number than 10, Polaris 10 is actually a larger, higher end GPU than Polaris 11. Chief Architect & head of AMD’s Radeon Technologies Group confirmed at Capsaicin that the naming scheme is time-based & Polaris 10 had simply been designed before Polaris 11, hence the smaller numerical designation.

http://wccftech.com/amd-launching-polaris-10-gpu-june-1st-computex/

It seems just as likely that the 12-14 TFLOPs number is only for the small Vega(10), while big Vega(11) sits at 18-21 TFLOPs.

The rumors could suggest something like: (speculation)

4096 stream processors @ ~1400 mhz, 8/16 gigabyte memory @ 512 GB/s bandwidth and 225W TBP = small Vega (to go up against GTX 1080)

6144 stream processors @ ~1400 mhz, 16/32* gigabyte memory @ 1024 GB/s bandwidth and 300W TBP = big Vega (to go up against Titan XP)

The 32 gigabyte memory version will probably only be for Firepro cards.
The big Vega will probably be using a AIO watercooled setup ala the Fury X (rated upwards to 500W TBP)

The reason for them to use the Vega10 as a base for the dual card is simply because Vega11 is a 300w TBP part.
Would be much more sensible for them to use downclocked (ala nano) Vega10 as a base for the dual card then.

 

[gamervivek]

AMD making an x2 card out of the smaller Vega is wishful thinking. 64CUs seems the max limit for GCN without restructuring most of the chip. Those Vega11 rumors were earlier than the new rumors of Vega 10,11,20 and navi.

The embedded parts show a 1.4Ghz boost freq. for Polaris 11 which bodes well for Vega chips.

http://www.anandtech.com/show/10710/amd-announces-embedded-radeon-e9260-e9550

 

[Det0x]

AMD making an x2 card out of the smaller Vega is wishful thinking.

Once again, pretty much every rumors points towards Vega10 being the smaller one.

And why is it wishful thinking, when the most recent "leak" from videocardz says the same thing ?

Vega 10 will be released in first quarter of 2017, it has 64 Compute Units and 24TF 16-bit computing power. Vega 10 is based on14nm GFX9 architecture. It comes with 16GB of HBM2 memory with a bandwidth of 512 GB/s. The TBP is currently expected at around 225W. Meanwhile, dual Vega 10 will be released in second quarter of 2017 and TBP should be around 300W.

64CUs seems the max limit for GCN without restructuring most of the chip

I don't see how you would reach this conclusion, based on what information ? Iam not trying to be jackass, just want learn something new, because it seems i have missed something.. (?)

Vega is Graphics IPv9, Tonga/Fiji was Graphics IPv8, Polaris was Graphics IPv8.1. Vega is the same graphics family with Greenland GPU, Raven Ridge APU GPUs. It is brand new architecture. What this means is that we know NOTHING at all.

And even if 64CU's were the upper limit for a Graphics IPv8.1 design, it still don't tell us anything about Vega. (IPv9)

Those Vega11 rumors were earlier than the new rumors of Vega 10,11,20 and navi.

Those latest rumors from videocardz don't say anything which contradicts Vega11 from being the bigger one, if anything they further supports the claim.

Like I said yesterday, full details of VEGA 11 were not yet disclosed. However, I did tell you that Polaris 10 will be replaced by Vega 11 next year. Of course, what I meant was the professional market. It does not mean there won’t be Polaris 10-based Radeons next year. It means that more powerful solutions will be offered in Radeon Pro series with VEGA GPU.

 

[Glo.]

Those latest rumors from videocardz don't say anything which contradicts Vega11 from being the bigger one, if anything they further supports the claim.

FUDZilla Article says that Vega 11 is smaller one from Vega stack. I have not seen AMD making dual GPU out of not top of the line solution at any particular time. 295X2, Pro Duo, S9300X2, even RX480X2 was rumored to be built from two Polaris 10 GPUs.

Nothing in the naming scheme would indicate that Vega 10 is the smaller or bigger one, if we take conclusion based on time-based naming scheme, that the first GPU designed is the one getting lower number.

Thirdly: If Vega is significantly faster architecture than Polaris, there is a point of using Vega 10 as bigger one, and designing Vega 11 as the smaller, one with lower performance.

 

[Det0x]

I have not seen AMD making dual GPU out of not top of the line solution at any particular time.

The Radeon Pro Duo is essentially and effectively two Radeon R9 Nanos together on a single PCB.

http://www.anandtech.com/show/10279/amd-releases-radeon-pro-duo-fiji-350w-vr

The reason for them to use the Vega10 as a base for the dual card could simply be because Vega11 is a 300w TBP part.
Would be much more sensible for them to use downclocked (ala nano) Vega10 as a base for the dual card then.

Nothing in the naming scheme would indicate that Vega 10 is the smaller or bigger one, if we take conclusion based on time-based naming scheme, that the first GPU designed is the one getting lower number.

Agree, but it seems FUDZilla used this as the main reason why Vega11 had to be smaller then Vega10.

The Vega 11 seems to be a mainstream part, following the same path as the Polaris 10 and 11. Polaris 10 was a performance – mainstream card which ended up branded as Radeon RX 480 while Polaris 11 ended up as the Radeon RX 460 playing in $120 to $150 market.

Atleast its unclear to me how they came to that conclusion..

Thirdly: If Vega is significantly faster architecture than Polaris, there is a point of using Vega 10 as bigger one, and designing Vega 11 as the smaller, one with lower performance.

I would guess that depends on the launch windows.. Maybe the needed HBM2 memory (512GB/s vs 1024GB/s) for the bigger Vega is simply not be available / too high priced for a early 2017 launch, so they had to go with the smaller (bandwidth) die first.

And maybe, just maybe, they have learned from the masters in how to milk the enthusiast costumers, making them upgrade twice a year

 

[Glo.]

http://www.anandtech.com/show/10279/amd-releases-radeon-pro-duo-fiji-350w-vr



Agree, but it seems FUDZilla used this as the main reason why Vega11 had to be smaller then Vega10.

Atleast its unclear to me how they came to that conclusion..

I would guess that depends on the launch windows.. Maybe the needed HBM2 memory (512GB/s vs 1024GB/s) for the bigger Vega is simply not be available / too high priced for a early 2017 launch, so they had to go with the smaller (bandwidth) die first.

And maybe, just maybe, they have learned from the masters in how to milk the enthusiast costumers, making them upgrade twice a year

First of all, I do not think you know what is Nano. It is Fiji XT chip power gated. Radeon Pro, S9300X2 all of them use Fiji XT chips. The ones that are in Fury X. 295X2 used Hawaii XT, and 480X2 was rumored to use Ellesmere XT chip.

FUDZilla used reason that Vega 10 is the bigger one, because lately they are pretty well informed, especially about AMD. They are not basing their information on nothing, but on pretty good sources. They can still be wrong, however(Zen APUs to use Polaris GPUs according to FUDZ).

What we have seen about Raven Ridge APUs, that use the same GPU family as Vega, and what is becoming apparent from the specs is that the GPU architecture is designed to somehow work with only 2048 bit memory controller. Dual chip would have in theory 1TB/s of memory bandwidth, but only in case of unified memory idea implemented in the frame buffer for the dual chip GPU. Otherwise it will just see two pools of memory, separated from each other.

And then: In July AMD has said that Vega architecture lands within two quarters. Then we have information that we will see Vega for enthusiast market in 1H 2017. What this means: Small Vega is coming out soon. Large Vega is coming out later. Possibly with huge paper launch on small Vega - limited quantity through 2016, and wider through 2017.

One last bit: http://radeon.com/en-us/1-year-of-perfecting-pixels/ At the bottom: It's time, to aim for the stars. Again!
I do not have to say what are Polaris and Vega in astronomy.

 

[gamervivek]

Once again, pretty much every rumors points towards Vega10 being the smaller one.

And why is it wishful thinking, when the most recent "leak" from videocardz says the same thing ?

The new rumors don't. AMD don't make dual ships out of smaller chips.
And where does it say the same thing?

I don't see how you would reach this conclusion, based on what information ? Iam not trying to be jackass, just want learn something new, because it seems i have missed something.. (?)

AMD has been using 4 shader engines since Hawaii. Fury X has 16CUs per engine and is terribly bottlenecked since it barely improves half as much as the shader increase compared to Hawaii. In some cases it doesn't improve at all.

Cramming in 50% more shaders would require more shader engines and ROPs and rearranging the memory system along with it. Doesn't look like AMD are bothering with it.

And even if 64CU's were the upper limit for a Graphics IPv8.1 design, it still don't tell us anything about Vega. (IPv9)

The IP version is for ISA but doesn't necessarily mean big changes on architectural level. Hawaii(gfx 7) still has same 4 shader engines layout as Fiji(gfx 8).

Those latest rumors from videocardz don't say anything which contradicts Vega11 from being the bigger one, if anything they further supports the claim.

I didn't see it.

What'd be interesting is whether Vega shows up in xbox scorpio like polaris 10 does for PS4 pro. They showed off a GDDR5 based chip instead of HBM2.

 

[Glo.]

AMD has been using 4 shader engines since Hawaii. Fury X has 16CUs per engine and is terribly bottlenecked since it barely improves half as much as the shader increase compared to Hawaii. In some cases it doesn't improve at all.

Cramming in 50% more shaders would require more shader engines and ROPs and rearranging the memory system along with it. Doesn't look like AMD are bothering with it.

Fiji design was using 4 shader engines with 16 CU's in each shader, and 16 ROPs.

If AMD would want to bring completely new, and more balanced design to the table they would have to bring... 8 shader engines with 8 CU design with 12 ROPs each. And highly increased throughput of the engines. And highly increased power gating capabilities of the GPUs.

That would make 8 shader engines for 4096 GCN cores, 96 ROPs. 48 CU design - only 6 shader engines, with 3072 GCN cores and 72 ROPs.

It is 2 ways they can achieve 4096 GCN core design - non-balanced design like Fiji was with just 4 shader engines.
Or much more scalable with 8 smaller ones, with higher throughput. There is unfortunately no "in-between" road, apart from reducing the number of ROPs possible for each CU.

I am very curious which way they will go.

One of the rumors that was floating about Vega is that it might bring next gen. schedulers to the table.

Other thing is that 4096 GCN core design requires complete overhauling the architecture layout if it is supposed to be balanced and fully utilized 100% of the time. Interesting times, really.

 

[Det0x]

The new rumors don't. AMD don't make dual ships out of smaller chips.
And where does it say the same thing?

Pretty much all the (earlier) rumors i linked above says that Vega10 is the small die, while Vega11 is the big version.

Do you agree with the above statement ?

Then we have Videocardz which posts rumored spec's for Vega10, while remaining silent regarding Vega11, hence all the "???" in the chart:

Further they also say that the dual card will be using Vega10's as a base. Which means that if we follow the rumors, the dual card will be using the smaller die. ((to limit the TBP in my guesstimation)4850 X2 can serve as an example for this)

AMD has been using 4 shader engines since Hawaii. Fury X has 16CUs per engine and is terribly bottlenecked since it barely improves half as much as the shader increase compared to Hawaii. In some cases it doesn't improve at all.

Cramming in 50% more shaders would require more shader engines and ROPs and rearranging the memory system along with it. Doesn't look like AMD are bothering with it.

The IP version is for ISA but doesn't necessarily mean big changes on architectural level. Hawaii(gfx 7) still has same 4 shader engines layout as Fiji(gfx 8).

Vega is said the be an entirely new architecture if we still follow the rumors. So we pretty much have no idea how it will perform/diminishing returns/build-up.
But ain't the bolded part exactly what the rumors say they are redesigning in Vega, especially regarding the change to HBM2 ?

What'd be interesting is whether Vega shows up in xbox scorpio like polaris 10 does for PS4 pro. They showed off a GDDR5 based chip instead of HBM2.

Yeah we could discuss this for days, but still be no wiser since all we are dealing with are rumors.
Think we all are just looking forward to a enthusiast offering from AMD, and we go by every little tidbit of rumors/leaks we can find until it launches
PS, thanks for keeping a civil tone and not restoring to condescending posts like some other guys.

 

[Head1985]

Fiji design was using 4 shader engines with 16 CU's in each shader, and 16 ROPs.

If AMD would want to bring completely new, and more balanced design to the table they would have to bring... 8 shader engines with 8 CU design with 12 ROPs each. And highly increased throughput of the engines. And highly increased power gating capabilities of the GPUs.

That would make 8 shader engines for 4096 GCN cores, 96 ROPs. 48 CU design - only 6 shader engines, with 3072 GCN cores and 72 ROPs.

It is 2 ways they can achieve 4096 GCN core design - non-balanced design like Fiji was with just 4 shader engines.
Or much more scalable with 8 smaller ones, with higher throughput. There is unfortunately no "in-between" road, apart from reducing the number of ROPs possible for each CU.

I am very curious which way they will go.

One of the rumors that was floating about Vega is that it might bring next gen. schedulers to the table.

Other thing is that 4096 GCN core design requires complete overhauling the architecture layout if it is supposed to be balanced and fully utilized 100% of the time. Interesting times, really.

Always expect worst from AMD because you know-They dont have money they need.
Btw 8x shader engines=128Rops max.
6x shader engines=96Rops max.
4x shader engines =64Rops max.

But yeah it will be interesting.They NEED 6x or 8x shader engines.

 

[garagisti]

It's the same exact GPU.

Well, AMD has launched FirePro cards much later than consumer cards before as well. Haven't they?

 

[Glo.]

Always expect worst from AMD because you know-They dont have money they need.
Btw 8x shader engines=128Rops max.
6x shader engines=96Rops max.
4x shader engines =64Rops max.

But yeah it will be interesting.They NEED 6x or 8x shader engines.

Actually no. If you consider 8 shader engines with 16 CU designs - then yes, it can be 128 ROPs.

But not with 8 CU design in each of shader engines. This is diagram from Polaris 11 die:

There is only room for one more ROP cluster. So maximum in 8 shader engine, 8 CU design/shader engine is 3 ROP clusters/ 12 ROPs - 96 ROPs total.

 

[Head1985]

Polaris 10 have 9x cu in shader engine.I think it is same architecture like FIJI so max is 16x

 

[Glo.]

Polaris 10 have 9x cu in shader engine.I think it is same architecture like FIJI so max is 16x

That is Polaris 11 diagram. And that is exactly my point. If you have 64 CU design and 8 shader engines, that means all of them are built from 8 CU's. And that means there is room for max. 3 ROP clusters(12 ROPs) per shader engine. So total design for 4096 GCN core, 8 shader engine GPU is 96 ROPs.
3072 GCN core design is made from 6 shader engines, with 72 ROPs.
Both are fairly logical.

The only way to create balanced design of the GPU for AMD is to make more shader engines, but with smaller amount of CU's in them.

This alone would make the architecture binary incompatible with previous generations. So this may be a clue where the GPU arch is heading.

If we think also about what Navi is supposed to bring to the table - scalability. The only way for achieving this is also creating large amount of Shader engines made from smaller amount of CU's.

So you can scale this indefinitely from 1 Shader engine, to 8,9, 10 shader engine designs.

 

[Alqoxzt]

Old but Doesn't it say the whole new architecture?

 

[Glo.]

Old but Doesn't it say the whole new architecture?

"...chip of First graphics IPv9 generation..."

 

[Alqoxzt]

"...chip of First graphics IPv9 generation..."

I was just curios that it could be a whole new architecture and a successor to present one because it says whole new architecture and previous info about 232mm from such profile was right and this is not the place where they could be lying.

 

[gamervivek]

Fiji design was using 4 shader engines with 16 CU's in each shader, and 16 ROPs.

If AMD would want to bring completely new, and more balanced design to the table they would have to bring... 8 shader engines with 8 CU design with 12 ROPs each. And highly increased throughput of the engines. And highly increased power gating capabilities of the GPUs.

That would make 8 shader engines for 4096 GCN cores, 96 ROPs. 48 CU design - only 6 shader engines, with 3072 GCN cores and 72 ROPs.

It is 2 ways they can achieve 4096 GCN core design - non-balanced design like Fiji was with just 4 shader engines.
Or much more scalable with 8 smaller ones, with higher throughput. There is unfortunately no "in-between" road, apart from reducing the number of ROPs possible for each CU.

I am very curious which way they will go.

One of the rumors that was floating about Vega is that it might bring next gen. schedulers to the table.

Other thing is that 4096 GCN core design requires complete overhauling the architecture layout if it is supposed to be balanced and fully utilized 100% of the time. Interesting times, really.

I doubt that 12 ROPs would work, not a power of two and might have to change memory subsystem to accmodate that. AMD don't scale the front end of their bigger chips like nvidia do in the same generation. So I'm leaning on it being more like Tahiti and Pitcairn than Hawaii and Pitcairn.

Pretty much all the (earlier) rumors i linked above says that Vega10 is the small die, while Vega11 is the big version.

Do you agree with the above statement ?

Then we have Videocardz which posts rumored spec's for Vega10, while remaining silent regarding Vega11, hence all the "???" in the chart:

Further they also say that the dual card will be using Vega10's as a base. Which means that if we follow the rumors, the dual card will be using the smaller die. ((to limit the TBP in my guesstimation)4850 X2 can serve as an example for this)

I'm going on off latest rumors here otherwise for Vega to have HBM2 as a feature meant that they were big chips in need of that bandwidth. Bigger in specs than Fiji.

4850x2 was not even a cut down chip let alone different chip altogether.

Vega is said the be an entirely new architecture if we still follow the rumors. So we pretty much have no idea how it will perform/diminishing returns/build-up.
But ain't the bolded part exactly what the rumors say they are redesigning in Vega, especially regarding the change to HBM2 ?

Not entirely new. As I said the gfx IP goes up a notch like it did from Hawaii to Fiji and the ISA changes.

Making a memory subsystem for HBM is different from making it work with mismatched ROPs and bus width, think of Tahiti with 384-bit bus with 32ROPs. Come to think of it, Xbox scorpio has a 384-bit bus width and likely will be a 48ROPs part, we might see a six shader engine config there.

 

[Glo.]

I doubt that 12 ROPs would work, not a power of two and might have to change memory subsystem to accmodate that. AMD don't scale the front end of their bigger chips like nvidia do in the same generation. So I'm leaning on it being more like Tahiti and Pitcairn than Hawaii and Pitcairn.

Not entirely new. As I said the gfx IP goes up a notch like it did from Hawaii to Fiji and the ISA changes.

Making a memory subsystem for HBM is different from making it work with mismatched ROPs and bus width, think of Tahiti with 384-bit bus with 32ROPs. Come to think of it, Xbox scorpio has a 384-bit bus width and likely will be a 48ROPs part, we might see a six shader engine config there.

48 ROPs, you say? That falls perfectly in line with six shader config and 2 ROP clusters in each, Shader Engine, coupled with 8 CU design.

3072 GCN core design. Interesting in the context of Vega, which I have just discussed in few posts.

 

[gamervivek]

Well, it could be 3 as well, more likely actually.