Update (Nov 4, 2015): The details were removed at Intel's request

[witeken]

Some details of Intel "Denverton" SoCs for microservers

Fudzilla's article: http://www.fudzilla.com/news/processors/39156-intel-s-denverton-has-16-next-generation-cpu-cores.

* 16 Goldmont cores (instead of Airmont)
* H2'16
* 2MB cache per module
* With 128GB RAM double the memory at DDR4-2400 instead of DDR3-1600
* 10Gbit ethernet
* 16 PCIe 3.0 instead of 2.0

So has Intel requested the removal of this information because it's so accurate, or because it's too optimistic ? Unusual thing to do, in any case.

 

[ShintaiDK]

Information under NDA is always requested for remove.

It does look like a standard evolutionary update besides the SoC integration. But that was expected due to Xeon-D.