UPDATE: It's getting worse!! - The Inquirer - I'm arguing with one of their Journo's via email

DivideBYZero

Lifer
May 18, 2001
24,117
2
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UPDATE: Now the same hack is stating that Prescott will be 64bit
rolleye.gif
See HERE.

Read this Cr@p

So more pins = more 'bit-ness', fvck off, fool.

So I emailed this:

> > Hi Charlie,
>
> I wonder, what exactly leads you to believe that you need 'more pins'
> to go 64bit operation?
>
> What part of having 64bit registers leads to extra pinouts?
>
> How many pins would I need to develop a 128bit CPU? 200 extra?
>
> I think you'll find they were laughing at you, not with you.
>
> TD.

Then tonight I get this reply from him:

Umm, how about the fact that socket 478 does not have enough address
pins to do 64 bit memory addressing. No, that couldn't be it. How about
the fact that all Intel chips with SSE2 can already do 128 bit SIMD
calculations. Basically, you don't have a clue, I would recommend that
you know what you are talking about before you criticize others, it
makes you look a whole lot less stupid.

-Charlie

LOL! Not enough address pins to do 64bit memory addressing? LMFAO!

So I sent this by return:

You really are on shaky ground suggesting you have superior knowledge fella.

And here's why:

The P4 has 8 128bit registers for SIMD calculations ONLY. These are internal registers and have a very specific application. The P4 cannot work in a fully 128bit mode. As if I should have to tell you that...

DDR Memory has always worked on a 64bit data path, so why oh why, if we are working to your standards in the shabby article, do the Athlon and P4 not have a BOATLOAD OF EXTRA PINS? Could it be that you're totally clueless to the justification of extra pins in a CPU socket solution?

If we were to use your method, the P4 is short of about 400 pins, is it not?!

Did you know that the Pentium Pro(The first P6 core) was to have 64bit extensions to x86? How many extra pins do you think that would have had? Come tell, I'd love to have your calculations.

I stand by my first assertion, that they were yanking your extremely daft chain good and hard, getting a giggle out of it at the same time.

Those who can, work in the industry. Those who can't write crap like your article.

I'll keep you all updated. Made me laugh my t!ts off. :D

New reply

>I'm amazed you can spell the word stupid.
>
>
Actually, the spell checker caught it.

>Do you know anything about hypertransport? What do you think is the
>difference between the A64 and A64FX, which has 754 pins vs. 939/940?
>
>
Just about everything HT wise. Talked to many of the engineers at
length. The difference between the memory A64 and the FX is the die it
was based on. FX=Opteron die, dual mem controllers etc, same chip.
Without quoting my article, know what the 939/940 difference is?

>Is it because the A64FX is 128Bit? 256Bit? Or because you know nothing
>about why the pins are there in the first place?
>
>
64, with a single 128 bit wide memory channel.

>You really are on shaky ground suggesting you have superior knowledge fella.
>
>
Not really.

>And here's why:
>
>The P4 has 8 128bit registers for SIMD calculations ONLY. These are
>internal registers and have a very specific application. The P4 cannot work
>in a fully 128bit mode. As if I should have to tell you that...
>
>
Yes. Your point?

>DDR Memory has always worked on a 64bit data path, so why oh why, if we are
>working to your standards in the shabby article, do the Athlon and P4 not
>have a BOATLOAD OF EXTRA PINS? Could it be that you're totally clueless to
>the justification of extra pins in a CPU socket solution?
>
>
No, I am right.

>If we were to use your method, the P4 is short of about 400 pins, is it
>not?!
>
>
297 pins short, rectified around next June.

>Did you know that the Pentium Pro(The first P6 core) was to have 64bit
>extensions to x86? How many extra pins do you think that would have had?
>Come tell, I'd love to have your calculations.
>
>
2 per bit, or 64 more, plus a few for overhead.

>I stand by my first assertion, that they were yanking your extremely daft
>chain good and hard, getting a giggle out of it at the same time.
>
>
OK, believe what you will.

>Those who can, work in the industry. Those who can't write crap like your
>article.
>
>
Guess I am sh!t then.

>Put this unedited into flame of the week, if you've got the stomach for it.
>
>
Actually, I don't do that column, but I'll pass it to Mike ASAP.

-Charlie

Super Tool rides again, so I reply:

Er, 940 ECC, 939 non, AFAIK.

Simply stating 'I am right' doesn't cut much mustard. You clearly stated in your "Article" that more pins = more bits. This is cr@p.

x86-64 is an extension of the x86 instruction set that adds support for 64-bit code and for system memory amounts beyond the 4GB ceiling of all 32-bit processors - the Opteron has 40-bit (1 terabyte) physical and 48-bit (256 teraybtes) virtual memory-addressing capability.

So what of the MAXIMUM 40bit memory addressing capability of Opteron? Gee, that should surely save some pins?

Seriously.
:D
 

Richdog

Golden Member
Feb 10, 2003
1,658
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LOL, there's something very satisfying about a know-all journalist being proved wrong, don't you think? That is assuming you're right (which I presume you are), the number of pins on a CPU isn't my forte! Hehe i wonder if he'll reply to you again... :):beer:
 

Richdog

Golden Member
Feb 10, 2003
1,658
0
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I don't see an edit... :p

OK now I do ;)

EDIT - Seems like you have him stumped, but for future reference try and not use words like cr@p etc if you want to be taken that little bit more seriously and come accross as a little more professional, mature and credible. NOT a criticism at all, just the opinion of someone who studied Journalism. Congrats, and it will be interesting to see whether he publishes it or not. :D:beer:
 

zephyrprime

Diamond Member
Feb 18, 2001
7,512
2
81
So more pins = more 'bit-ness', fvck off, fool.
I read that article and I thought the exact some thing! God, I can't believe such a know nothing can write articles for all the world to read.

The P4 has more pins than the P3 (478 vs 370) so why isn't the P4 already 64bit? But it's not. Both the P3 and P4 are 32bit and have 128bit sse (doesn't really matter) and have 64 external memory busses with 32bit addressing.
 

DivideBYZero

Lifer
May 18, 2001
24,117
2
0
RD, yeah, the 'cr@p' bit was in return to him calling me stupid and clueless. As if!

I know I was facecious(sp) in my initial response, but he published it giving it a gospel. So he should expect someone calling him on his utter BS.

 

Jeff7181

Lifer
Aug 21, 2002
18,368
11
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Just more to prove all my previous statements that The Inquirer is not a reputable source of information.
 

Duvie

Elite Member
Feb 5, 2001
16,215
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Have PM respond and then send that to him....Would he take the word of a INtel chip designer???
 

DivideBYZero

Lifer
May 18, 2001
24,117
2
0
Originally posted by: Duvie
Have PM respond and then send that to him....Would he take the word of a INtel chip designer???

I doubt it. I might PM Wingnutz for some info...
 

redpriest_

Senior member
Oct 30, 1999
223
0
0
It's not about the registers this time, it's about being able to put out a 64-bit address onto a memory bus. 64-bit data bus is different from a 64-bit address bus. Some processors actually use the same 64-bit bus to do both, and some put both out separately.Think about it this way - the 8088 was a 16-bit chip but only had an 8-bit address bus, it took twice as long as the 8086 did to get the address out.
 

DBZ, I knew you had an AMD without even looking at your sig. Try not to make so obvious will ya?

::::Embarrased::::

GM
 

DivideBYZero

Lifer
May 18, 2001
24,117
2
0
Originally posted by: gorillaman
DBZ, I knew you had an AMD without even looking at your sig. Try not to make so obvious will ya?

::::Embarrased::::

GM

So you think the article on the Inquirer was accurate? Factual?

State your case, and I will not be drawn into your trolling my current CPU choice.
 

CTho9305

Elite Member
Jul 26, 2000
9,214
1
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Originally posted by: Wingznut
Originally posted by: Jeff7181
Just more to prove all my previous statements that The Inquirer is not a reputable source of information.

the inquirer is about as reliable as the national enquirer.
rolleye.gif
 

chsh1ca

Golden Member
Feb 17, 2003
1,179
0
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But more pins does mean more bits! Everyone knows that! Even the uber d00dz at Intel I spoke too who called me Micky McMoron and told me they were really engineers.

:D

I really do honestly wonder about why anyone would bother attempting to show they're knowledgeable without making sure...
 

pm

Elite Member Mobile Devices
Jan 25, 2000
7,419
22
81
Intel has a company policy on commenting on future products which can easily be summed up in one word: don't. So I won't comment on anything beyond the facts of general CPU design.

Usually more pins are added to a design to reduce resistance/impedance in the power supply. Choosing easily-divisible numbers that do not reflect any real product: when you are around 1V and you have a CPU that can dissipate 100W peak and that can fluctuate the current requirements wildly within microseconds, that's as much 100A flowing through the pins. It only takes a very small resistance to result in a fairly large voltage drop through the package (V=IR). So you add more power and ground pins in to reduce the resistance/impedance. If you look at the pin out of any modern CPU, you should see that a huge percentage are used for supplying power. (I don't have time to count myself). But this said, it doesn't have to the case: one could add pins for practically any reason.
 

CTho9305

Elite Member
Jul 26, 2000
9,214
1
81
Originally posted by: pm
Intel has a company policy on commenting on future products which can easily be summed up in one word: don't. So I won't comment on anything beyond the facts of general CPU design.

Usually more pins are added to a design to reduce resistance/impedance in the power supply. Choosing easily-divisible numbers that do not reflect any real product: when you are around 1V and you have a CPU that can dissipate 100W peak and that can fluctuate the current requirements wildly within microseconds, that's as much 100A flowing through the pins. It only takes a very small resistance to result in a fairly large voltage drop through the package (V=IR). So you add more power and ground pins in to reduce the resistance/impedance. If you look at the pin out of any modern CPU, you should see that a huge percentage are used for supplying power. (I don't have time to count myself). But this said, it doesn't have to the case: one could add pins for practically any reason.

How about just using bigger pins?
 

pm

Elite Member Mobile Devices
Jan 25, 2000
7,419
22
81
How about just using bigger pins?
Good question. I don't know why they only have one pin size. It makes sense that they are all homogenously sized, but as to why all of them aren't thicker... I don't know.