Well I wasn't aware of this development but I went and read up a little at xtreme systems and a poster (high5) said:
"there was a general consensus that safe Vcore limit is Vdimm/2 - 0.325V."
And another poster (creidiki) said:
"So long as your VDIMM is within JDEC specs (i believe up to 2.7) you can go down to lowest C'n'C voltage... is that 0.95v? 0.9v? Im not sure, but that's your safe margin for the voltage differential betwen the mem controller and main core... check the sticky for info."
Which makes sense, since whatever the CPU normally undervolts to would have to be a safe voltage for all JDEC spec'ed memory voltages or stock systems would be dying all the time (I think creidiki meant to type C'n'Q for Cool and Quiet).
Anyways I'm guessing whatever power circuitry there is between the memory and the CPU can't really handle too huge of a voltage difference before the voltage just runs over from the memory, so this might actually vary depending on what kind of motherboard/chipset you're running. Like, maybe the chipset will prevent power leaks so long as the voltage difference is under a certain amount (since voltage is after all a measure of electrical "pressure") but if the voltage difference is too huge then the pressure just kinda makes the electricity go right through. I didn't think this would actually happen but I guess it's somewhat plausible.
I finally found the original thread over at XS:
http://www.xtremesystems.org/forums/showthread.php?t=79509
OOOOH it's because the memory controller on A64's is integrated into the chip itself!!! Haha I totally forgot that, the voltage from the memory doesn't need to jump through any chipsets-the memory is already talking to the CPU (apparently at 1/2 VDimm).
Heh I guess that means Conroe will be immune to this since it doesn't have an on-die memory controller...yay undervolting all the way!