TSMC needs to get their act together...

[Arachnotronic]

I will quote Joe Macri of AMD who is their product CTO as to why 20nm is unsuitable for high performance devices.

http://www.theregister.co.uk/Print/2014/01/14/amd_unveils_kaveri_hsa_enabled_apu/

Kaveri is baked in a 28-nanometer, planar, bulk silicon process, which is nowhere near as efficient as state-of-the-art FinFET (what Intel calls "Tri-Gate") or even the less-than-TriGate, more-than-bulk – and somewhat expensive – silicon-on-insulator (SOI) process that was used in Kaveri's predecessor.

There were reasons to go with 28nm rather than 22nm, Macri told us, that were discovered during the design process. That process was run by what he identified as a "cross-functional team" composed of "CPU guys, graphics guys, mixed-signal folks, our process team, the backend, layout team."

That cross-functional crew identified a boatload of process variants, and members of the team each ran tests based on their areas of interest, examining such factors as power curves and die-area needs.

"What we found was with the CPU with planar transistors, when we went from 28 to 22, we actually started to slow down," he said, "because the pitch of the transistor had to become much finer, and basically we couldn't get as much oomph through the transistor."

The problem, he said, was that "our IDsat was unpleasant" at 22nm, referring to gate drain saturation current*. In addition, the chip's metal system needed to be scaled down to fit within the 22nm process, which increased resistance.

"So what we saw was the frequency just fall off the cliff," he said. "This is why it's so important to get to FinFET."

the register article also links to a crash course in silicon gate saturation current and related electronic engineering

http://www.eecs.berkeley.edu/~hu/Chenming-Hu_ch6.pdf

btw I am sure Macri was talking of 20nm because there is no foundry with a 22nm process. If you still disagree thats fine but there is enough evidence that TSMC 20nm is not a high performance process. If you just looked at the process flavours and naming you should get a clue. TSMC has only variant of its 20nm process called 20SoC. TSMC 28 nm started off with 28HP (high performance with high k metal gates) and 28LP (low performance polysilicon).

http://www.tsmc.com/tsmcdotcom/PRListingNewsAction.do?action=detail&newsid=6181

Today TSMC 28nm has over half a dozen variants

https://www.semiwiki.com/forum/content/4530-tsmc-unleashes-aggressive-28nm-strategy.html?

20SoC is a short lived node and going to be quickly replaced by 16FF+. So for high performance (at a much higher cost) customers will go to 16FF+ and for cost sensitive requirements 28 nm with its various variants will serve the market for years to come.

Um, that's interesting and all, but GPUs aren't typically high frequency devices; they're a whole bunch of relatively low frequency devices that work in parallel to deliver high performance.

Also note that the SPARC M7 is expected to run at >3.6GHz.

 

[raghu78]

Um, that's interesting and all, but GPUs aren't typically high frequency devices; they're a whole bunch of relatively low frequency devices that work in parallel to deliver high performance.

Also note that the SPARC M7 is expected to run at >3.6GHz.

but high end gpus are high TDP devices. anyway here is pcper's take and it agrees with what I have been saying

http://www.pcper.com/reviews/Editorial/28-nm-GPUs-Extended-Through-2015-20-nm-Planar-Bust

When 28 nm was released the plans on the books were to transition to 20 nm products based on planar transistors, thereby bypassing the added expense of developing FinFETs. It was widely expected that FinFETs were not necessarily required to address the needs of the market. Sadly, that did not turn out to be the case. There are many other factors as to why 20 nm planar parts are not common, but the limitations of that particular process node has made it a relatively niche process node that is appropriate for smaller, low power ASICs (like the latest Apple SOCs). The Apple A8 is rumored to be around 90 mm square, which is a far cry from the traditional midrange GPU that goes from 250 mm sq. to 400+ mm sq.

The essential difficulty of the 20 nm planar node appears to be a lack of power scaling to match the increased transistor density. TSMC and others have successfully packed in more transistors into every square mm as compared to 28 nm, but the electrical characteristics did not scale proportionally well. Yes, there are improvements there per transistor, but when designers pack in all those transistors into a large design, TDP and voltage issues start to arise. As TDP increases, it takes more power to drive the processor, which then leads to more heat. The GPU guys probably looked at this and figured out that while they can achieve a higher transistor density and a wider design, they will have to downclock the entire GPU to hit reasonable TDP levels. When adding these concerns to yields and bins for the new process, the advantages of going to 20 nm would be slim to none at the end of the day."

 

[ShintaiDK]

This ...

People here keep forgetting that the biggest issue isn't the performance characteristics offered by TSMC's 20nm node, it's the cost scaling ...

Yep. And its only going to be worse with 14/16FF. But AMD and nVidia is forced to use it to keep selling. But they will be screaming and kicking all the way in anger. And we gonna get another long cycle of that node for GPUs.

 

[raghu78]

Yep. And its only going to be worse with 14/16FF. But AMD and nVidia is forced to use it to keep selling. But they will be screaming and kicking all the way in anger. And we gonna get another long cycle of that node for GPUs.

There is no way that TSMC 10FF based GPUs arrive 4+ years from the first TSMC 16FF+ GPUs. The delay from 28nm to 16nm was due to FINFET. Now that problem is solved and 10FF will arrive 2 - 2.5 years from 16FF+. btw 10FF will be a lesser leap from 16FF+ compared to TSMC 16FF+ from TSMC 28HPM.

http://community.cadence.com/cadenc...0nm-is-ready-for-design-starts-at-this-moment

"Due to aggressive scaling, the 10nm FinFET (10FF) process node increases logic density by 2.1X compared to the TSMC 16nm FinFET Plus (16FF+) process node. Compared to 16FF+, the 10FF node can offer a 20% speed increase at the same power, or more than 40% power reduction at the same speed. TSMC has demonstrated a fully functional 256Mb SRAM in 10FF technology with die size scaling close to 50% of 16FF+."

As for 7nm that could be where the real challenge starts again. :thumbsup:

 

[ShintaiDK]

The issue is cost, not node avalibility.

 

[lopri]

TSMC's 20nm really isn't that great even going by A7-> A8. (~10% perf/clock increase) Apple is going back to Samsung for A9.

Forget S810 and lack of everything else.

 

[lopri]

I wonder if this is really true though. GPU's aren't really very high performance devices, they're more very high throughput devices. Most of the difference between a low end GPU and a high end GPU is the high end having more of the low end's parts replicated. You don't need a better process to make that happen.

You can see this in Tegra X1, which is a TSMC 20nm part. It has two Maxwell SMMs, and appears to clock at 1GHz, which is not that much lower than high end desktop 28nm Maxwell parts. Even if they really couldn't get a higher clock speed, which I doubt, if the power consumption was lower enough then the improved density would more than make up for it.

The real reason I think nVidia and AMD haven't been eager to put GPUs on TSMC 20nm is because it doesn't offer enough of a performance/power consumption improvement over 28nm, and they knew 16FF/16FF+ would be available not much longer. They wouldn't be using 20nm for long enough to amortize the cost of development and outweigh the initial very expensive process costs. While in mobile there's more pressure to maintain a very aggressive development schedule because of competition (eg from Intel), and there's a higher volume.

Sensible post I am persuaded to agree with.

This ...

People here keep forgetting that the biggest issue isn't the performance characteristics offered by TSMC's 20nm node, it's the cost scaling ...

You can say that it is always about cost.. on everything. That proves too much and it does not add much substance to the discussion.

 

[ThatBuzzkiller]

You can say that it is always about cost.. on everything. That proves too much and it does not add much substance to the discussion.

If the conclusion is trivial then that's the end of it ...

A discussion is meant to come to a conclusion especially on the internet, there is no need for filler ...

 

[soccerballtux]

Yep. And its only going to be worse with 14/16FF. But AMD and nVidia is forced to use it to keep selling. But they will be screaming and kicking all the way in anger. And we gonna get another long cycle of that node for GPUs.

this tradeoff between higher yields on a more mature process and lower power on a newer process is very interesting. You could go to a newer process, but eat the lower yields; or you could stick with the 28nm you know and just lay out a larger die using your design experience with 4 years of 28nm to avoid and redesign the transistor arrangements that lead to faulty yield.

 

[3DVagabond]

So cost and yields aren't TSMC's responsibility? They've always been able to drop to newer processes and save costs because of increase in dies per wafer. Now they can't, but it's not the processes fault?

 

[Abwx]

Your one liners aren't informative.

Shintai is half right and half wrong simultaneously.

He s right that a better process would require paying premiums, where he is wrong is that he stated that Nvidia wasnt willing to pay while this is exactly what they did for their recent GPUs.

It s now s a certainity (it is documented) that their current GPUs improved perf/Watt is entirely due to a different process than the generic 28nm used by AMD, and it makes no doubt that they had to pay a premium to TSMC.

AMD should definitly get rid of thoses overpriced and crappy processes that sabotaged massively at least one of their recent product, GF process proved to be much superior to TSMC s by 40-50% better perf/Watt.

 

[ShintaiDK]

So cost and yields aren't TSMC's responsibility? They've always been able to drop to newer processes and save costs because of increase in dies per wafer. Now they can't, but it's not the processes fault?

You can blame the lack of EUV. But design cost itself is also spiralling up, EUV or not. Samsung for example states that the design cost for a 14nm chip is 4x of a 28nm. So even if you went 600mm2 to 300mm2 from 28nm to 14FF and still kept around the same transistor amount and ignored the slightly higher transistor cost. You still end up with a much higher bill.

 

[dacostafilipe]

It s now s a certainity (it is documented) that their current GPUs improved perf/Watt is entirely due to a different process than the generic 28nm used by AMD, and it makes no doubt that they had to pay a premium to TSMC.

Could you point me to where you found this information?

Thx

 

[Abwx]

Could you point me to where you found this information?

Thx

Sorry, i didnt record the page in my HDD, I ll check in the browser history to get the link.

IIRC it is stated that six types of transistors have been used depending of the usage, with three types making the bulk of the chip.

 

[Arachnotronic]

So cost and yields aren't TSMC's responsibility? They've always been able to drop to newer processes and save costs because of increase in dies per wafer. Now they can't, but it's not the processes fault?

Yield is the responsibility of both the foundry and the design house. The foundry needs to have it together, but even if the foundry's process is good, a design could still yield poorly if the design isn't done properly.

 

[soccerballtux]

So cost and yields aren't TSMC's responsibility? They've always been able to drop to newer processes and save costs because of increase in dies per wafer. Now they can't, but it's not the processes fault?

they are but they aren't. You can purchase either time, or chips; from TSMC. Depends on what you'd like to do

edit: this doesn't directly address what you're saying

 

[JDG1980]

The issue is cost, not node avalibility.

If that was the case, then why didn't Nvidia use 20nm for GK210? These go into expensive ($5,000) Tesla cards only, so foundry cost shouldn't be the deciding factor. They run at relatively slow clockspeeds (562-875 MHz). And they are sold for professional applications where saving power in a large GPU farm can really matter. If 20nm were actually suitable for large-die GPUs and cost was the only issue, then Nvidia would have used it for GK210. The other sources indicate that TSMC 20nm was fundamentally flawed; you need FinFETs to get high performance at these small process sizes. 20nm without FinFETs is worthless for anything except smartphone crap - full stop.

 

[ShintaiDK]

If that was the case, then why didn't Nvidia use 20nm for GK210? These go into expensive ($5,000) Tesla cards only, so foundry cost shouldn't be the deciding factor. They run at relatively slow clockspeeds (562-875 MHz). And they are sold for professional applications where saving power in a large GPU farm can really matter. If 20nm were actually suitable for large-die GPUs and cost was the only issue, then Nvidia would have used it for GK210. The other sources indicate that TSMC 20nm was fundamentally flawed; you need FinFETs to get high performance at these small process sizes. 20nm without FinFETs is worthless for anything except smartphone crap - full stop.

Yet 3.6Ghz+ 600+ mm2 SPARC high power dies can be made on that 20nm.

I think you wastly overestimate how many Tesla cards nVidia sell and at what price. Just because its 5000$ on Newegg doesnt mean those buying any sort of volume of them pays anything near that.

And do you think people would buy more Tesla cards? Or is it just wasted money for the time being to shrink it? Can the ROI support it?