I'm currently attempting a hobby project on an ASUS SPAX-M motherboard found in an HP Pavilion 4440 (yes, it's very old). The motherboard was made with support for up to an 83 MHz FSB, but the jumper pins have been removed, practically hard-locking the FSB at 66 MHz. I'm currently running it with a K6-2 400, but my goal, ultimately, is to try to run a K6-3+ 500. I already know that there is support for the K6+ processors, so my final challenge is to run the FSB at 83 MHz so that I can run a processor at 500 MHz.
Through searching the internet for people with the same motherboard who are trying to accomplish the same goal, one suggestion was to try bridging the pin headers. Through some experimentation I discovered that this was technically impractical since the motherboard is hard-wired at the 66 MHz setting; I verified this using my multimeter by testing the resistance between the applicable pin headers.
Using some nickel print I did "successfully" bridge the necessary pin headers to achieve the 83 MHz setting, but the end result was that all of the pins in each group I needed to bridge became shorted instead of just the ones I wanted (due to the MB being hard-wired internally). If there was a way to sever the unnecessary pins, that would be ideal, but I see no easy way of doing so since any traces that I would need to sever are not on the surface. Boot-ups were unpredictable, usually reverting back to the 66 MHz setting, and when it did boot at the 83 MHz setting, it wouldn't pass the POST screen.
I should also mention that there is also a jumper for locking the PCI bus speed which is hard-wired at the FSB/2 setting instead of being locked at 32 MHz. I suspect that this also posed an issue when it tried to boot at the 83 MHz FSB. For good measure I also bridged the necessary pin headers for this setting.
The second suggestion was to adjust the FSB using software. I've tried testing several programs (softFSB, CPUFSB, ClockGen). The first thing I discovered was that these programs did not offer support for my particular motherboard or the clock generator chip that it uses, and naturally so, given the fact that this is somewhat of a proprietary motherboard, though I'm somewhat surprised that the clock generator chip was not supported.
I've made the most headway using softFSB thanks to its "user-friendly" ability to create the necessary PLL-IC data file used for addressing the clock generator (though I've heard of this also being done with other programs). I was able to find the datasheet for my clock generator (ICS 9169CJ-272) but it did not seem to contain all the information I needed to fully create the PLL-IC file needed for this program, and hence my current dilemma. I'm trying to figure out how to map all the frequencies which the datasheet provided me and all the Byte settings which the datasheet makes no mention of.
-Is there some low-level knowledge I need concerning clock generators in general which is necessary for creating this data file?
-Is this knowledge assumed for anyone trying to create this data file?
-Is there a program someone knows about which supports the clock generator on this motherboard?
-Is there anyone with experience in creating PLL-IC files using softFSB, or anyone with enough knowledge about clock generators who would be able to help me map the frequencies properly?
-Can this BIOS be programmed to support other FSB frequencies? If so (and I'm assuming it can), do you know someone who could do this type of programming?
If there is anyone out there with some kind of knowledge concerning any of the above items who would be able to help me, please let me know. I've made it this far, but now I've hit a brick wall, and it would be a shame to have to give up at this point. Many thanks in advance.
Through searching the internet for people with the same motherboard who are trying to accomplish the same goal, one suggestion was to try bridging the pin headers. Through some experimentation I discovered that this was technically impractical since the motherboard is hard-wired at the 66 MHz setting; I verified this using my multimeter by testing the resistance between the applicable pin headers.
Using some nickel print I did "successfully" bridge the necessary pin headers to achieve the 83 MHz setting, but the end result was that all of the pins in each group I needed to bridge became shorted instead of just the ones I wanted (due to the MB being hard-wired internally). If there was a way to sever the unnecessary pins, that would be ideal, but I see no easy way of doing so since any traces that I would need to sever are not on the surface. Boot-ups were unpredictable, usually reverting back to the 66 MHz setting, and when it did boot at the 83 MHz setting, it wouldn't pass the POST screen.
I should also mention that there is also a jumper for locking the PCI bus speed which is hard-wired at the FSB/2 setting instead of being locked at 32 MHz. I suspect that this also posed an issue when it tried to boot at the 83 MHz FSB. For good measure I also bridged the necessary pin headers for this setting.
The second suggestion was to adjust the FSB using software. I've tried testing several programs (softFSB, CPUFSB, ClockGen). The first thing I discovered was that these programs did not offer support for my particular motherboard or the clock generator chip that it uses, and naturally so, given the fact that this is somewhat of a proprietary motherboard, though I'm somewhat surprised that the clock generator chip was not supported.
I've made the most headway using softFSB thanks to its "user-friendly" ability to create the necessary PLL-IC data file used for addressing the clock generator (though I've heard of this also being done with other programs). I was able to find the datasheet for my clock generator (ICS 9169CJ-272) but it did not seem to contain all the information I needed to fully create the PLL-IC file needed for this program, and hence my current dilemma. I'm trying to figure out how to map all the frequencies which the datasheet provided me and all the Byte settings which the datasheet makes no mention of.
-Is there some low-level knowledge I need concerning clock generators in general which is necessary for creating this data file?
-Is this knowledge assumed for anyone trying to create this data file?
-Is there a program someone knows about which supports the clock generator on this motherboard?
-Is there anyone with experience in creating PLL-IC files using softFSB, or anyone with enough knowledge about clock generators who would be able to help me map the frequencies properly?
-Can this BIOS be programmed to support other FSB frequencies? If so (and I'm assuming it can), do you know someone who could do this type of programming?
If there is anyone out there with some kind of knowledge concerning any of the above items who would be able to help me, please let me know. I've made it this far, but now I've hit a brick wall, and it would be a shame to have to give up at this point. Many thanks in advance.
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