True meaning of "PCwxyz" number?

shira

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Jan 12, 2005
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I understand that memory with lower memory timings is generally more over-clockable than memory with higher timings. But what does the "PCwxyz" number mean for a given set of timings?

I've read in other threads that, "That's the guaranteed FSB speed at which the memory will run stable." But does that explanation mean that the memory will be stable at the indicated speed (wxyz/16) WITHOUT raising the timings from the rated values?

If NOT, then what do the timings mean for a wxyz number greater than 3200? Also, why is some memory given a rating of PC3200 with timings of 2225 (in this example, timings that will typically support FSB speeds well in excess of 250MHz), while other memory produced by the same manufacturer is denoted "PC4000" with higher timings (and this memory will also run stable at 250MHz)? Is this just a way to confuse the memory-buying public?

Is there any way, just reading the PCwxyz number AND the timings, that a person can get a rough idea as to the maximum FSB speed the memory will support?
 

Matthias99

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Oct 7, 2003
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PCXXXX (where XXXX is the bandwidth in MB/sec., as derived from clockspeed) is guaranteed to run at the specified FSB, at the specified timings.

PC2100 = DDR266 (133Mhz FSB)
PC2700 = DDR333 (166Mhz FSB)
PC3200 = DDR400 (200Mhz FSB)

Now, PC3200/DDR400 is the fastest JEDEC spec currently out there, so anything beyond there is technically 'overclocking RAM', since no motherboards run stock above DDR400.

PC3500 = DDR433 (216.666Mhz FSB)
PC4000 = DDR500 (250Mhz FSB)

Timings have to be specified at a particular FSB speed, since they are normally defined in terms of clock cycles, and the length of a clock cycle changes as the FSB speed goes up or down. You can work out how many ns a particular FSB/timing combination results in, and then use that to extrapolate to other FSB/timing speeds -- but this is not always accurate, because sometimes there are other timing restrictions on the chip.

Edit:

Here's how to do those calculations:

Let's say you have PC3200 (DDR400/200Mhz) RAM that is specced for 2-2-2-5 timings. The most critical one is the first (CL), which is the number of clock cycles allowed for the setup of a read or write operation.

At 200Mhz, each clock cycle is 1000/200 = 5ns long (five nanoseconds, or five billionths of a second)

5ns per clock cycle * 2 clock cycles = 10ns. Theoretically, this RAM needs 10ns to setup a read or write command (at least that's what the rating tells us).

Let's say we want to OC this RAM to 220Mhz. At 220Mhz, each clock cycle is (1000/220) ~= 4.5ns.

10ns (cycle time of the RAM) / 4.5ns (time/clock cycle at the new FSB speed) = 2.22 clock cycles.

So this RAM will most likely need to be run at CL2.5, or maybe even CL3 at this speed (at CL2, you would be asking it to do this setup in only 9ns, which is faster than its rated speed). This is not a guarantee, as there can be other timing restrictions that are impossible to know about from these specs, but it can give you a rough estimate of how a memory might overclock. Also, changing the input voltage can drastically change the behavior of the RAM.
 

Bozo Galora

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Oct 28, 1999
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Is there any way, just reading the PCwxyz number AND the timings, that a person can get a rough idea as to the maximum FSB speed the memory will support?

nope
 

shira

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Jan 12, 2005
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Originally posted by: Matthias99
Let's say you have PC3200 (DDR400/200Mhz) RAM that is specced for 2-2-2-5 timings. The most critical one is the first (CL), which is the number of clock cycles allowed for the setup of a read or write operation.

At 200Mhz, each clock cycle is 1000/200 = 5ns long (five nanoseconds, or five billionths of a second)

5ns per clock cycle * 2 clock cycles = 10ns. Theoretically, this RAM needs 10ns to setup a read or write command (at least that's what the rating tells us).

This gets to the heart of my original question: Suppose RAM is spec'ed by the manufacturer as PC4000 with a CL of 3. Does that mean that the memory's setup time is (1000/200)*3 = 15ns OR (1000/250)*3 = 12ns?

If the CL timing is ALWAYS based on a 200MHz bus speed, why then do manufacturers use, say, a "PC4000" designation for memory that's intended to run (stock) on systems with a 200MHz FSB?

 

Matthias99

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Oct 7, 2003
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Originally posted by: shira
Originally posted by: Matthias99
Let's say you have PC3200 (DDR400/200Mhz) RAM that is specced for 2-2-2-5 timings. The most critical one is the first (CL), which is the number of clock cycles allowed for the setup of a read or write operation.

At 200Mhz, each clock cycle is 1000/200 = 5ns long (five nanoseconds, or five billionths of a second)

5ns per clock cycle * 2 clock cycles = 10ns. Theoretically, this RAM needs 10ns to setup a read or write command (at least that's what the rating tells us).

This gets to the heart of my original question: Suppose RAM is spec'ed by the manufacturer as PC4000 with a CL of 3. Does that mean that the memory's setup time is (1000/200)*3 = 15ns OR (1000/250)*3 = 12ns?

The latter. The latencies given are for the highest rated speed of the RAM (unless they specify otherwise).

If the CL timing is ALWAYS based on a 200MHz bus speed, why then do manufacturers use, say, a "PC4000" designation for memory that's intended to run (stock) on systems with a 200MHz FSB?

PC4000 is designed to be run at speeds of up to 250Mhz, and is rated by the manufacturer for those speeds. Buying PC4000 to run at PC3200 speeds is generally a waste of money at best. This is memory that is intended for people who want to overclock to a very high FSB.

It's a chicken-and-egg problem. You can't produce motherboards/chipsets with a stock DDR1 FSB speed higher than 200Mhz, since there are no official JEDEC guidelines for DDR1 memory faster than 200Mhz, and so there would not be any RAM that could be officially certified to run at those speeds. Some of the memory companies have produced RAM that is unofficially certified (and generally guaranteed) to run at higher speeds -- but this is not a big enough market to warrant entire new lines of motherboards and chipsets.