Transistor technology moving forward?

[Arachnotronic]

So, I was thinking...we're hitting pretty much the physical limits of how much we can shrink transistors.

When that limit gets hit, what do we do then?

 

[drizek]

Find another hobby

 

[Arachnotronic]

Never!

 

[Ben90]

I guess we will just have to...












EXPAND TO THE CLOUD!

 

[BEL6772]

We've been on the verge of hitting the physical limits for at least five process generations now. For example, we got to the point where the gate oxide just a few atoms thick ... couldn't be any thinner. What happened? We moved to a different, previously not manufacturable gate structure ... metal gates with a high-k dielectric.

Just because we don't presently see the way forward, doesn't mean that a way forward doesn't exist.

 

[ShadowVVL]

Ditch copper and try new materials maybe?

This has been a question Ive been wondering as well, but who know what engineers have up their sleeves for when that day comes.

I don't know much about transistors, but Im wondering since intel is making a tri gate transistor for 22nm, if its possible we will see a quad gate years from now?

 

[Tsavo]

So, I was thinking...we're hitting pretty much the physical limits of how much we can shrink transistors.

When that limit gets hit, what do we do then?

The major resource used to overcome technological limits is money. Lots and lots of money.

Intel has lots of money. Lots and lots of money, so I look forward to many more "physical limits" being pushed aside by progress.

 

[eldaveo]

I read a few weeks ago about a new breakthrough in quantum computing. I highly doubt it will reach consumer products in the next decade (or two, or three), but they're definitely making progress in that field.

http://www.extremetech.com/article2/0,2845,2385665,00.asp

It can hardly do much right now, and costs a small fortune, but then again, the first silicon microprocessors were in the same boat back when they were first invented.

 

[Borealis7]

Graphene perhaps...

 

[Idontcare]

So, I was thinking...we're hitting pretty much the physical limits of how much we can shrink transistors.

When that limit gets hit, what do we do then?

 

[soccerballtux]

So, I was thinking...we're hitting pretty much the physical limits of how much we can shrink transistors.

not till we hit 5/10nm are we at the "limit"

 

[Ken g6]

Graphene perhaps...

For interconnects (replacing copper), maybe. Maybe even for replacing the metal gate on transistors. But that probably won't help shrink them past 5nm. Edit: I could be wrong.

I wonder if anyone's ever tried using both sides of a silicon wafer? Twice as many transistors per square mm, right? ^_^

 

[Cogman]

For interconnects (replacing copper), maybe. Maybe even for replacing the metal gate on transistors. But that probably won't help shrink them past 5nm.

I wonder if anyone's ever tried using both sides of a silicon wafer? Twice as many transistors per square mm, right? ^_^

Graphene would actually make an excellent replacement for everything. The problem is the fact that we don't currently have a good way to manufacture it or include it into our current lithography tech. Including it to any degree would essentially mean throwing out all our current fab equipment and getting new stuff.

 

[PandaBear]

I wonder if anyone's ever tried using both sides of a silicon wafer? Twice as many transistors per square mm, right? ^_^

I remember back in my days working on wafer handling equipment that the back side is not very useful as the processes need to hold it for support and annealing would pull impurities toward the back side. They also grind the wafer thinner for low profile chips at the end of the processes.

Most importantly, it doesn't address equipment time regardless of single or double side wafer especially on lithography. It would be far cheaper to grow another insulator and then silicon layer on top to stack it than to use the other side.

 

[Borealis7]

i believe the aliens Intel holds in their basement have already given them the technology. they're just preparing it for mass production.

 

[Seero]

So, I was thinking...we're hitting pretty much the physical limits of how much we can shrink transistors.

When that limit gets hit, what do we do then?

According to wikipedia, Graphene nanoribbons are proven to be capable of replacing silicon as a semiconductor at 2007. At 2009, researches demonstrated 4 different logic gates from a single graphene transistor. At Feb 2010, researchers at IBM reported that they were able to construct graphene transistors operating at 100 Ghz, with silicon-manufacturing equipment.

Recently, some researchers from University of Illinois found that Graphene transistors actually have self cooling capability. Replacing Silicon with Graphene nanoribbons can trigger a hardware revolution, define new rules to the definition of possibility.

This is just the beginning.

 

[dac7nco]

i believe the aliens Intel holds in their basement have already given them the technology. they're just preparing it for mass production.

Truth!

 

[Idontcare]

Quantum transistor promises easier fab than Intel's 3D transistor

Avto Metals plc's Avto Quantum Transistor (AQT), on which it recently received a US patent, modulates electrical signals via a tunneling electron either constructively or destructively interfering with electrons' wave function in a gate material.

Benefits of the quantum-effect transistor include smaller size, faster operation, and lower power and heat. Avto claims that the transistor is easier to manufacture than advanced-concept transistors, such as Intel Corporation's "trigate" 22nm node 3D transistor.

Avto's patent, US Patent 7,893,422, "Transistor on the Basis of New Quantum Interference Effect," describes a quantum interference transistor made of a thin metal film with source and drain zones, a several-angstroms-thick insulating layer above the thin film, and a smaller metal island gate on top. The quantum interference effect in the thin film creates a potential barrier (V=0) or does not exist (V=Vc), explained Dr. Walitzki. "When the potential-barrier exists it is a case of a closed transistor and when no potential-barrier exists it is a case of an open transistor." Walitzki says this results in more perfect open and closed conditions, avoiding current leakage, noise, and wasted power.

http://www.electroiq.com/index/disp...ises-easier-fab-than-Intel-3d-transistor.html