Info TOP 20 of the World's Most Powerful CPU Cores - IPC/PPC comparison

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Richie Rich

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Added cores:
  • A53 - little core used in some low-end smartphones in 8-core config (Snapdragon 450)
  • A55 - used as little core in every modern Android SoC
  • A72 - "high" end Cortex core used in Snapdragon 625 or Raspberry Pi 4
  • A73 - "high" end Cortex core
  • A75 - "high" end Cortex core
  • Bulldozer - infamous AMD core
Geekbench 5.1 PPC chart 6/23/2020:

Pos
Man
CPU
Core
Year
ISA
GB5 Score
GHz
PPC (score/GHz)
Relative to 9900K
Relative to Zen3
1​
Nuvia​
(Est.)​
Phoenix (Est.)​
2021​
ARMv9.0​
2001​
3.00​
667.00​
241.0%​
194.1%​
2​
Apple​
A15 (est.)​
(Est.)​
2021​
ARMv9.0​
1925​
3.00​
641.70​
231.8%​
186.8%​
3​
Apple​
A14 (est.)​
Firestorm​
2020​
ARMv8.6​
1562​
2.80​
558.00​
201.6%​
162.4%​
4​
Apple​
A13​
Lightning​
2019​
ARMv8.4​
1332​
2.65​
502.64​
181.6%​
146.3%​
5​
Apple​
A12​
Vortex​
2018​
ARMv8.3​
1116​
2.53​
441.11​
159.4%​
128.4%​
6​
ARM Cortex​
V1 (est.)​
Zeus​
2020​
ARMv8.6​
1287​
3.00​
428.87​
154.9%​
124.8%​
7​
ARM Cortex​
N2 (est.)​
Perseus​
2021​
ARMv9.0​
1201​
3.00​
400.28​
144.6%​
116.5%​
8​
Apple​
A11​
Monsoon​
2017​
ARMv8.2​
933​
2.39​
390.38​
141.0%​
113.6%​
9​
Intel​
(Est.)​
Golden Cove (Est.)​
2021​
x86-64​
1780​
4.60​
386.98​
139.8%​
112.6%​
10​
ARM Cortex​
X1​
Hera​
2020​
ARMv8.2​
1115​
3.00​
371.69​
134.3%​
108.2%​
11
AMD
5900X (Est.)
Zen 3 (Est.)
2020
x86-64
1683
4.90
343.57
124.1%
100.0%
12​
Apple​
A10​
Hurricane​
2016​
ARMv8.1​
770​
2.34​
329.06​
118.9%​
95.8%​
13​
Intel​
1065G7​
Icelake​
2019​
x86-64​
1252​
3.90​
321.03​
116.0%​
93.4%​
14​
ARM Cortex​
A78​
Hercules​
2020​
ARMv8.2​
918​
3.00​
305.93​
110.5%​
89.0%​
15​
Apple​
A9​
Twister​
2015​
ARMv8.0​
564​
1.85​
304.86​
110.1%​
88.7%​
16
AMD
3950X
Zen 2
2019
x86-64
1317
4.60
286.30
103.4%
83.3%
17​
ARM Cortex​
A77​
Deimos​
2019​
ARMv8.2​
812​
2.84​
285.92​
103.3%​
83.2%​
18​
Intel​
9900K​
Coffee LakeR​
2018​
x86-64​
1384​
5.00​
276.80​
100.0%​
80.6%​
19​
Intel​
10900K​
Comet Lake​
2020​
x86-64​
1465​
5.30​
276.42​
99.9%​
80.5%​
20​
Intel​
6700K​
Skylake​
2015​
x86-64​
1032​
4.00​
258.00​
93.2%​
75.1%​
21​
ARM Cortex​
A76​
Enyo​
2018​
ARMv8.2​
720​
2.84​
253.52​
91.6%​
73.8%​
22​
Intel​
4770K​
Haswell​
2013​
x86-64​
966​
3.90​
247.69​
89.5%​
72.1%​
23​
AMD​
1800X​
Zen 1​
2017​
x86-64​
935​
3.90​
239.74​
86.6%​
69.8%​
24​
Apple​
A13​
Thunder​
2019​
ARMv8.4​
400​
1.73​
231.25​
83.5%​
67.3%​
25​
Apple​
A8​
Typhoon​
2014​
ARMv8.0​
323​
1.40​
230.71​
83.4%​
67.2%​
26​
Intel​
3770K​
Ivy Bridge​
2012​
x86-64​
764​
3.50​
218.29​
78.9%​
63.5%​
27​
Apple​
A7​
Cyclone​
2013​
ARMv8.0​
270​
1.30​
207.69​
75.0%​
60.5%​
28​
Intel​
2700K​
Sandy Bridge​
2011​
x86-64​
723​
3.50​
206.57​
74.6%​
60.1%​
29​
ARM Cortex​
A75​
Prometheus​
2017​
ARMv8.2​
505​
2.80​
180.36​
65.2%​
52.5%​
30​
ARM Cortex​
A73​
Artemis​
2016​
ARMv8.0​
380​
2.45​
155.10​
56.0%​
45.1%​
31​
ARM Cortex​
A72​
Maya​
2015​
ARMv8.0​
259​
1.80​
143.89​
52.0%​
41.9%​
32​
Intel​
E6600​
Core2​
2006​
x86-64​
338​
2.40​
140.83​
50.9%​
41.0%​
33​
AMD​
FX-8350​
BD​
2011​
x86-64​
566​
4.20​
134.76​
48.7%​
39.2%​
34​
AMD​
Phenom 965 BE​
K10.5​
2006​
x86-64​
496​
3.70​
134.05​
48.4%​
39.0%​
35​
ARM Cortex​
A57 (est.)​
Atlas​
0​
ARMv8.0​
222​
1.80​
123.33​
44.6%​
35.9%​
36​
ARM Cortex​
A15 (est.)​
Eagle​
0​
ARMv7 32-bit​
188​
1.80​
104.65​
37.8%​
30.5%​
37​
AMD​
Athlon 64 X2 3800+​
K8​
2005​
x86-64​
207​
2.00​
103.50​
37.4%​
30.1%​
38​
ARM Cortex​
A17 (est.)​
0​
ARMv7 32-bit​
182​
1.80​
100.91​
36.5%​
29.4%​
39​
ARM Cortex​
A55​
Ananke​
2017​
ARMv8.2​
155​
1.60​
96.88​
35.0%​
28.2%​
40​
ARM Cortex​
A53​
Apollo​
2012​
ARMv8.0​
148​
1.80​
82.22​
29.7%​
23.9%​
41​
Intel​
Pentium D​
P4​
2005​
x86-64​
228​
3.40​
67.06​
24.2%​
19.5%​
42​
ARM Cortex​
A7 (est.)​
Kingfisher​
0​
ARMv7 32-bit​
101​
1.80​
56.06​
20.3%​
16.3%​

GB5-PPC-evolution.png

GB5-STperf-evolution.png

TOP10PPC_CPU_frequency_evolution_graph.png



TOP 10 - Performance Per Area comparison at ISO-clock (PPA/GHz)

Copied from locked thread. They try to avoid people to see this comparison how x86 is so bad.[/B]

Pos
Man
CPU
Core
Core Area mm2
Year
ISA
SPEC PPA/Ghz
Relative
1​
ARM Cortex​
A78​
Hercules​
1.33​
2020​
ARMv8​
9.41​
100.0%​
2​
ARM Cortex​
A77​
Deimos​
1.40​
2019​
ARMv8​
8.36​
88.8%​
3​
ARM Cortex​
A76​
Enyo​
1.20​
2018​
ARMv8​
7.82​
83.1%​
4​
ARM Cortex​
X1​
Hera​
2.11​
2020​
ARMv8​
7.24​
76.9%​
5​
Apple​
A12​
Vortex​
4.03​
2018​
ARMv8​
4.44​
47.2%​
6​
Apple​
A13​
Lightning​
4.53​
2019​
ARMv8​
4.40​
46.7%​
7​
AMD​
3950X​
Zen 2​
3.60​
2019​
x86-64​
3.02​
32.1%​



It's impressive how fast are evolving the generic Cortex cores:
  • A72 (2015) which can be found in most SBC has 1/3 of IPC of new Cortex X1 - They trippled IPC in just 5 years.
  • A73 and A75 (2017) which is inside majority of Android smart phones today has 1/2 IPC of new Cortex X1 - They doubled IPC in 3 years.

Comparison how x86 vs. Cortex cores:
  • A75 (2017) compared to Zen1 (2017) is loosing massive -34% PPC to x86. As expected.
  • A77 (2019) compared to Zen2 (2018) closed the gap and is equal in PPC. Surprising. Cortex cores caught x86 cores.
  • X1 (2020) is another +30% IPC over A77. Zen3 need to bring 30% IPC jump to stay on par with X1.

Comparison to Apple cores:
  • AMD's Zen2 core is slower than Apple's A9 from 2015.... so AMD is 4 years behind Apple
  • Intel's Sunny Cove core in Ice Lake is slower than Apple's A10 from 2016... so Intel is 3 years behind Apple
  • Cortex A77 core is slower than Apple's A9 from 2015.... but
  • New Cortex X1 core is slower than Apple's A11 from 2017 so ARM LLC is 3 years behind Apple and getting closer



GeekBench5.1 comparison from 6/22/2020:
  • added Cortex X1 and A78 performance projections from Andrei here
  • 2020 awaiting new Apple A14 Firestorm core and Zen3 core
Updated:



EDIT:
Please note to stop endless discussion about PPC frequency scaling: To have fair and clean comparison I will use only the top (high clocked) version from each core as representation for top performance.
 
Last edited:
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Hitman928

Diamond Member
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It is up to the OP the explain the scores not me - i did remember he mentioned reviews, which should anyway be the minimum standard.

Yet again your are linking random Geekbench entries.

I have provided more examples and data behind where the scores came from than the O.P. ever has. So do you stand by your statement that the table looks accurate or not?
 

Hitman928

Diamond Member
Apr 15, 2012
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And your evidence for this is what?

Semiconductor knowledge as well as this:

a12-fvcurve_575px.png


 

Zucker2k

Golden Member
Feb 15, 2006
1,810
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People wanted to cheat. I remember one guy downclocked his x86 CPU to 2.6 GHz similar to Apple, probably boosted uncore and DDR mem to maximum and claimed score higher about +20% than my table. This is cheating. Apple core can also provide higher IPC at 1 GHz. GB database is full of tweaked and OC'ed systems with wrongly reported frequency. I try to use GB results from reviews as much as possible to get reasonable numbers. I stated this table is chart of IPC under normal maximum performance to avoid down clocking (cheating).
So, basically x86 can gain 20%+ ipc in this benchmark by just reducing clocks? Meaning this app scales so poorly that the lower the clocks, the higher the ipc? That's a very unusual choice of benchmark app because the lowest clocked chips have an inherent advantage.
 

Thala

Golden Member
Nov 12, 2014
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I pretty much doubt that this is a legit curve for N7P and A12, because this would mean Apple runs with VCC of around 1.1V, which is way outside the overdrive zone one would use for ultra mobile. Second for what cell distribution is this curve? For what corner is this curve - slow/slow perhaps?
Due to your semiconductor knowledge, i am confident you are aware of, that one can shift such a curve to the right by not using low-leakage/high-vt cells?

Anyway, this is pretty much off-topic.

So do you stand by your statement that the table looks accurate or not?

Sure, at first glance and without cross-checking any numbers in particular the order at least looks reasonable. There are minor things which are little surprising, as for instance Zen2 being in front of Cortex A77 - but its reasonably close.

ps. In addition i do not like that unreleased products are part of the table.
 
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Carfax83

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Nov 1, 2010
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Thats because it is relatively easy to increase the frequency if you have the power headroom to do so. You can see that the cores operate in a similar frequency range at the same voltage and process.

But the CPU microarchitecture has to be designed for high frequencies in mind no? It's not just a question of them pumping more voltage into the CPU for it to hit higher frequencies.
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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15,274
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I pretty much doubt that this is a legit curve for N7P and A12, because this would mean Apple runs with VCC of around 1.1V, which is way outside the overdrive zone one would use for ultra mobile. Second for what cell distribution is this curve? For what corner is this curve - slow/slow perhaps?
Due to your semiconductor knowledge, i am confident you are aware of, that one can shift such a curve to the right by not using low-leakage/high-vt cells?

Anyway, this is pretty much off-topic.



Sure, at first glance and without cross-checking any numbers in particular the order at least looks reasonable. There are minor things which are little surprising, as for instance Zen2 being in front of Cortex A77 - but its reasonably close.

ps. In addition i do not like that unreleased products are part of the table.
Did you read my reply on the last page ? all of this becomes a mute question if you are comparing apples to apples.
 
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Carfax83

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I pretty much doubt that this is a legit curve for N7P and A12, because this would mean Apple runs with VCC of around 1.1V, which is way outside the overdrive zone one would use for ultra mobile.

How often would the A12/A13/A14 be hitting max frequency for long enough periods of time to cause thermal problems on a strictly mobile platform?

Very little if any I'd wager. Unless the owner is gaming for long periods of time or running consecutive benchmarks, the CPU will probably never be sucking down such a high voltage on a consistent basis.
 
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coercitiv

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Jan 24, 2014
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Yet again your are linking random Geekbench entries.
First defending GB as a good indicator of overall CPU performance (which imho is fair game), then pushing for lack of reliability of the benchmark when it comes to even multiple "random" server class entries.

So, just to make it clear - GB5 is a good tool for estimating server CPU performance but only as long as the result comes from a reputable source, unless the CPU is unreleased in which case an anonymous forum used called Richie Rich is to be considered reputable source. Scientific criteria on one side, personal preference on the other.

FYI - the OP refused x86 server class GB5 results not based on reliability, but rather based on lower clocks used by most x86 server CPUs combined with the arbitrary rule of having only 1 entry per architecture.

So, basically x86 can gain 20%+ ipc in this benchmark by just reducing clocks? Meaning this app scales so poorly that the lower the clocks, the higher the ipc? That's a very unusual choice of benchmark app because the lowest clocked chips have an inherent advantage.
It's not the app's fault, think about what reducing clocks does to a computer with respect to CPU / memory subsystem relation. We're not comparing absolute performance or at least some proper relative indicator such as perf/watt (which would also put Apple cores first, mind you), it's an artificial comparison of PPC that heavily favors doing the work slowly so that the memory subsystem can keep up.

The reason for the PPC ranking is Apple and ARM products have traditionally been mobile oriented, and the main argument brought against them as server/desktop replacements in the forums was scaling (frequency, core count, interconnect). So therefore, perf/watt while being stunning for Apple at least, was not enough to lead imagination to new heights. Instead of waiting for more actual server/desktop silicon from Nuvia/Apple and other entitites, the OP created his own narrative in which revolutionary high performance ARM cores are always imminent, always at the next corner, and to support this scenario he chose to rely on PPC. This is also the reason we started seeing Nuvia and Apple future product estimates, an uncontrollable desire to make predictions happen.

You can witness his cognitive dissonance at work in the Apple A14 thread where even the remote possibility of A14 providing a generational leap in performance based mostly on higher clocks got him instantly tilted: first he rejected the GB results because of the clocks (he had no issue with the score), then quickly moved back to fantasy land with the wider A15 16c beast and the A19 12XALU juggernaut. If the present doesn't fit expectations, move to the future.

Semiconductor knowledge as well as this:
FYI, Thala was already presented with this information early this year.
 

naukkis

Senior member
Jun 5, 2002
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, it's an artificial comparison of PPC that heavily favors doing the work slowly so that the memory subsystem can keep up.

But with Apple core's that's not the case. They are equal in performance wise to higher clocked x86-cpu's. Instead donwnclocked x86-cpus are those artificial comparison points, making cpu's slower to improve IPC.
 
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naukkis

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And Intel is extremely desperate to chase higher IPC - but with x86 that results to very big cpu cores which aren't power efficient - which makes them unpractical to about every use case. Willow Cove cores are too big to be competitive in laptop space - and with Golden cove cores are too big to be competitive even in desktop-class - resulting they have to rely big.Little scheme even on desktop. Intel should have also been thinking about buying ARM holdings - they will have very rough years to come against nVidia server products.
 
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Zucker2k

Golden Member
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But with Apple core's that's not the case. They are equal in performance wise to higher clocked x86-cpu's. Instead donwnclocked x86-cpus are those artificial comparison points, making cpu's slower to improve IPC.
You're not going to gain 20%+ ipc on x86 platform by downclocking by 1GHz in Cinebench. What gives?
 

Richie Rich

Senior member
Jul 28, 2019
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So which is it, is the table accurate or can we not trust the numbers? What is the methodology for creating the table, what are the quality controls to make sure the numbers are accurate? What is the variability in scores? The numbers in the table are there completely on the whim of the person who created it with zero quality control. If you had actually read through the thread, you would know this.

Also,


All 3 on laptops using Renoir cores, all within boost spec, all showing higher ppc than what's in the table for Zen2 and that's with reduced L3 from the desktop products.


All 3 on server CPUs and server motherboards, all within boost spec, all showing much higher ppc than what's in the table for Zen2.

You can look for yourself, these are not abnormal scores. So are you going to argue that people are modding laptops and servers left and right just so they can score average scores on a mobile benchmarking app?

Edit: This doesn't even touch upon the fact that he's using a benchmark app designed primarily for phones and tablets to be the ultimate decider of IPC across all CPU segments.
  • You claim that Renoir has 1254 pts @ 1.8 GHz ..... resulting in 697 pts/GHz. 16-core Ryzen 3950X has only 286 pts/GHz. So you claim that Renoir has 2.4x higher IPC? Really? Why AMD bother with Zen3 +15% IPC development when they can install Renoir everywhere and go 10-year vacation?
  • You claim Epyc has 1094 pts @ 2.25 GHz .... resulting in 486 pts/GHz, which is 1.7x higher IPC than 3950X. No comment.
  • you claim this is how we should do the IPC comparison?


This is exactly the reason why I refused to update the IPC table with all these crazy non-sense low-clocked numbers. I told people: create your own and better IPC table. Show me how better you are. None. Silence. Obviously they like to hate however smart enough knowing that their own IPC table full of these crazy results would discredit them, not me. So they stick with hate.

Running CPU at max speed:
  • has eliminates frequency uncertainty.
  • deliver max performance and that's we are searching for
  • means we compare IPC at max performance for given uarch - that's the goal

It's clear that most people is angry due to Apple's almost double IPC and much bigger 6xALU architecture in compare to their poor 4xALU x86 CPUs. All those results denials, doubting, claiming AISC circuits and hidden aggressivity is just like when you take a toy from little kid. x86 CPU sucks last 5years. Apple is the new uarch leader now. Get over it. And get used to it because Nuvia Phoenix with 8xALU+4xBr = 12-wide uarch is coming soon.
;)
 

coercitiv

Diamond Member
Jan 24, 2014
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But with Apple core's that's not the case. They are equal in performance wise to higher clocked x86-cpu's. Instead donwnclocked x86-cpus are those artificial comparison points, making cpu's slower to improve IPC.
If and when Apple launches higher clocked desktop replacement SKUs based on the same arch used in the iPad, will you honestly ask the OP to use the lower PPC scores of the higher clocked SKUs instead? Think about that, the desktop part would likely crush the phone part in every single performance benchmark, yet the phone CPU will still win in PPC. Do you remember the time when the OP repeatedly tried to convince us that a 2.6Ghz Apple laptop CPU with 8 cores would be faster than competing x86 CPUs because consumer loads would scale better with core count than ST performance? You probably don't, because it was just another of his failed attempts to change the narrative towards a hypothetical winning scenario of his.

That's the problem with focusing on the winner, the ranking system criteria become opportunistic. You have someone like Thala who warns against using random benchmark numbers but openly embraces performance estimates from a stranger. This thread is a church of science, no longer separates belief from rigorous testing & reasoning.

Personally I don't care who wins the performance race, actually I kinda' rooted for ARM, until the latest developments it was the more open and arguably competition friendly ISA. Now it's more of a wash, but still ok either way.
 
Apr 30, 2020
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Thats because it is relatively easy to increase the frequency if you have the power headroom to do so. You can see that the cores operate in a similar frequency range at the same voltage and process.
That is really not true at all. Core design has a HUGE impact on clocks. Look back at AMD's Winchester vs. Orleans cores. Same process - but one maxed out at 2200 MHz, the other at 2600 MHz at the same power. Or how about we compare two different architectures on the same node - AMD Zen1 vs. AMD Polaris. Polaris struggles to achieve much more than ~1.3 GHz no matter how much power you give it.

Just because an Apple A-whatever can run at 2.6 GHz, doesn't means it'll hit 4 GHz even with all the power headroom in the world. If that were true, we'd already have 4-5 GHz "fast" ARM desktop CPUs. But we don't.
You claim that Renoir has 1254 pts @ 1.8 GHz ..... resulting in 697 pts/GHz. 16-core Ryzen 3950X has only 286 pts/GHz. So you claim that Renoir has 2.4x higher IPC? Really? Why AMD bother with Zen3 +15% IPC development when they can install Renoir everywhere and go 10-year vacation?
  • You claim Epyc has 1094 pts @ 2.25 GHz .... resulting in 486 pts/GHz, which is 1.7x higher IPC than 3950X. No comment.
  • you claim this is how we should do the IPC comparison?
This is exactly the reason why I refused to update the IPC table with all these crazy non-sense low-clocked numbers. I told people: create your own and better IPC table. Show me how better you are. None. Silence. Obviously they like to hate however smart enough knowing that their own IPC table full of these crazy results would discredit them, not me. So they stick with hate.
The problem is you are cherry picking clock speeds to what best suits your narrative. For example, in your chart, you assume the 3950X is pegged at 4.6GHz for the entire test, which is almost certainly not true. And then for these results that you do not like, you're assuming they're pegged at base clocks the entire time so they'd have ridiculously high numbers that you could just throw out - which is also not true. The Epyc 7742 has a 3.4 GHz max boost speed - yielding 321.7 pts/ghz - and that's assuming it stayed at that 3.4 GHz boost the entire time. The Renoir chips you also tossed out have a 4.2 Ghz max boost, yielding 298.5 pts/ghz - still better than the 3950X result you chose.

The 3950X result you chose is showing a 4% IPC increase over Zen 1 in your own chart. How you can even seriously entertain that as accurate?
 
Last edited:

NTMBK

Lifer
Nov 14, 2011
10,322
5,351
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That is really not true at all. Core design has a HUGE impact on clocks. Look back at AMD's Winchester vs. Orleans cores. Same process - but one maxed out at 2200 MHz, the other at 2600 MHz at the same power. Or how about we compare two different architectures on the same node - AMD Zen1 vs. AMD Polaris. Polaris struggles to achieve much more than ~1.3 GHz no matter how much power you give it.

Just because an Apple A-whatever can run at 2.6 GHz, doesn't means it'll hit 4 GHz even with all the power headroom in the world. If that were true, we'd already have 4-5 GHz "fast" ARM desktop CPUs. But we don't.

Wait, I thought Winchester was 90nm and Orleans was 65nm?

But you make a good point- just look at Conroe. Same 65nm process as the Pentium D that it replaced, but it targeted higher IPC and lower clocks, so it never clocked as high- despite the higher performance.
 

Hitman928

Diamond Member
Apr 15, 2012
6,123
10,532
136
First defending GB as a good indicator of overall CPU performance (which imho is fair game), then pushing for lack of reliability of the benchmark when it comes to even multiple "random" server class entries.

So, just to make it clear - GB5 is a good tool for estimating server CPU performance but only as long as the result comes from a reputable source, unless the CPU is unreleased in which case an anonymous forum used called Richie Rich is to be considered reputable source. Scientific criteria on one side, personal preference on the other.

FYI - the OP refused x86 server class GB5 results not based on reliability, but rather based on lower clocks used by most x86 server CPUs combined with the arbitrary rule of having only 1 entry per architecture.


It's not the app's fault, think about what reducing clocks does to a computer with respect to CPU / memory subsystem relation. We're not comparing absolute performance or at least some proper relative indicator such as perf/watt (which would also put Apple cores first, mind you), it's an artificial comparison of PPC that heavily favors doing the work slowly so that the memory subsystem can keep up.

The reason for the PPC ranking is Apple and ARM products have traditionally been mobile oriented, and the main argument brought against them as server/desktop replacements in the forums was scaling (frequency, core count, interconnect). So therefore, perf/watt while being stunning for Apple at least, was not enough to lead imagination to new heights. Instead of waiting for more actual server/desktop silicon from Nuvia/Apple and other entitites, the OP created his own narrative in which revolutionary high performance ARM cores are always imminent, always at the next corner, and to support this scenario he chose to rely on PPC. This is also the reason we started seeing Nuvia and Apple future product estimates, an uncontrollable desire to make predictions happen.

You can witness his cognitive dissonance at work in the Apple A14 thread where even the remote possibility of A14 providing a generational leap in performance based mostly on higher clocks got him instantly tilted: first he rejected the GB results because of the clocks (he had no issue with the score), then quickly moved back to fantasy land with the wider A15 16c beast and the A19 12XALU juggernaut. If the present doesn't fit expectations, move to the future.



FYI, Thala was already presented with this information early this year.

Yes, it is quite obvious by now that there is not an honest attempt to build a conclusion from data but rather seeking data to support a preconceived conclusion where any evidence to the contrary will be ignored.
 
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Hitman928

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  • You claim that Renoir has 1254 pts @ 1.8 GHz ..... resulting in 697 pts/GHz. 16-core Ryzen 3950X has only 286 pts/GHz. So you claim that Renoir has 2.4x higher IPC? Really? Why AMD bother with Zen3 +15% IPC development when they can install Renoir everywhere and go 10-year vacation?
  • You claim Epyc has 1094 pts @ 2.25 GHz .... resulting in 486 pts/GHz, which is 1.7x higher IPC than 3950X. No comment.
  • you claim this is how we should do the IPC comparison?


This is exactly the reason why I refused to update the IPC table with all these crazy non-sense low-clocked numbers. I told people: create your own and better IPC table. Show me how better you are. None. Silence. Obviously they like to hate however smart enough knowing that their own IPC table full of these crazy results would discredit them, not me. So they stick with hate.

Running CPU at max speed:
  • has eliminates frequency uncertainty.
  • deliver max performance and that's we are searching for
  • means we compare IPC at max performance for given uarch - that's the goal

It's clear that most people is angry due to Apple's almost double IPC and much bigger 6xALU architecture in compare to their poor 4xALU x86 CPUs. All those results denials, doubting, claiming AISC circuits and hidden aggressivity is just like when you take a toy from little kid. x86 CPU sucks last 5years. Apple is the new uarch leader now. Get over it. And get used to it because Nuvia Phoenix with 8xALU+4xBr = 12-wide uarch is coming soon.
;)

You are literally just making stuff up now to conquer straw men in your own mind. Point to me where I claimed any of what you said, actually quote me where I say what you claim.
 

Hitman928

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The problem is you are cherry picking clock speeds to what best suits your narrative. For example, in your chart, you assume the 3950X is pegged at 4.6GHz for the entire test, which is almost certainly not true. And then for these results that you do not like, you're assuming they're pegged at base clocks the entire time so they'd have ridiculously high numbers that you could just throw out - which is also not true. The Epyc 7742 has a 3.4 GHz max boost speed - yielding 321.7 pts/ghz - and that's assuming it stayed at that 3.4 GHz boost the entire time. The Renoir chips you also tossed out have a 4.2 Ghz max boost, yielding 298.5 pts/ghz - still better than the 3950X result you chose.

The 3950X result you chose is showing a 4% IPC increase over Zen 1 in your own chart. How you can even seriously entertain that as accurate?

Exactly. You can actually see what clock speeds the chips are running for the first part of the benchmark by adding .gb5 to the end of the link. If you do that it shows that all the examples I linked are at or very near max boost speed during the single core test (which they obviously should be) which yields ~ 300 pts/GHz for Renoir which has reduced L3 and 320+ pts/GHz for Rome. These are not just random picked examples, I've looked through pages of results and they are consistent scores. They are also laptops and server machines so it's not like someone is "modding" them for the highest GB5 scores, that's a ridiculous claim.

Also, everyone should be aware that the 20% increase in PPC in GB5 with reduced clocks is another straw man the OP created to try and excuse away better results than what are in his table. You will not get +20% PPC simply by reducing clocks. You may gain a few %, that's it. For instance, you can find plenty of examples of Ryzen cores at over 4 GHz that match the PPC of Rome at 3.4 GHz. It was just another excuse by OP to ignore results that didn't fit his narrative.
 

Doug S

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Sorry @Thala, but pumping more power into a chip and using HPC cells instead of low power cells will not let you run a 2.6 GHz Apple SoC at 5 GHz.

The design matters. Read up on FO4 delay, but the simple version is that a pipeline stage (i.e. the work that happens in a single clock cycle) can be further broken down by number of FO4 delays. If you target a lower clock rate, you might have for example 8 FO4 delays per clock cycle, but if you target high frequency you might design your circuits allowing only 6 FO4 delays per clock cycle. I recall the optimal for performance was pegged in the range of 6 to 8, not sure if that's still the case today but that's where I got the numbers for this example.

What that means is that the CPU that has 8 FO4 delays per cycle can get 33% more work done per cycle. If you had for example a multiplier circuit that required 24 FO4 delays to produce a result it could produce that result in 3 clock cycles on the low frequency design but require 4 clock cycles on the high frequency design. There's (part of) your IPC difference.

FO4 delay is defined by how fast transistors switch, so sure adding voltage and using faster transistors will reduce the FO4 delay (which is measured in picoseconds) but if you are trying to do 8 FO4 delays of work at 3 GHz and only 6 FO4 delays of work at 5 GHz I think it is easy to see why that 3 GHz design will have difficulty running at 5 GHz even if you give it more voltage and use faster transistors. As you clock it up, at some point it won't have enough time to get 8 FO4 delays worth of work accomplished in a clock cycle, and it fails to work properly.

Now like I said I'm giving the Cliff's Notes version so there's a lot more to this, you don't really design circuits that require 8 FO4 delays of work when you have exactly 8 FO4 delays available in a clock cycle at your target frequency. You have to have some headroom for process variance or your yield wil suck, and there is overhead so you don't have all 8 FO4 delays to allocate to moving your multiplier forward and so on. So in reality your circuits might require a range from 5 to 7.5 FO4 delays per cycle, but the ones that require 7.5 are the ones that will hit the wall first and cause something like say Prime95 to start producing incorrect results when you push things too far when overclocking.
 
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Doug S

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If we assume that Apple's A14 is running at 2.99/3.00 GHz as the leaked GB5 benchmarks indicate, they should be able to reach at least 3.6 GHz in a higher power design. HPC cells will buy you about 10%, and TSMC has said that other knobs they can turn where power is less important will buy another 10%. If they can bin a bit, the A14 might come within spitting distance of 4 GHz but wouldn't quite get there. That's about the best it will do, no amount of power increase would ever get it anywhere near 5 GHz. It simply isn't designed for that.

This is thinking about desktop stuff like iMac/Mac Pro where power draw doesn't matter, the Macbooks are a different matter. I wouldn't expect to see clock rates much above 3 GHz on the Macbook unless they do a totally different core for the Mac line.
 

naukkis

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If we assume that Apple's A14 is running at 2.99/3.00 GHz as the leaked GB5 benchmarks indicate, they should be able to reach at least 3.6 GHz in a higher power design. HPC cells will buy you about 10%, and TSMC has said that other knobs they can turn where power is less important will buy another 10%. If they can bin a bit, the A14 might come within spitting distance of 4 GHz but wouldn't quite get there. That's about the best it will do, no amount of power increase would ever get it anywhere near 5 GHz. It simply isn't designed for that.

This is thinking about desktop stuff like iMac/Mac Pro where power draw doesn't matter, the Macbooks are a different matter. I wouldn't expect to see clock rates much above 3 GHz on the Macbook unless they do a totally different core for the Mac line.

Why so obsessed with clock frequency? If Apple could clock A14 to 4GHz, that would mean about 2100 in Geekbench ST - good luck Intel and AMD to match it.
 
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