[ Toms ] Skylake Chipset Has Less Connectivity Than Expected

[BFG10K]

Not as good as it looks on paper: http://www.tomshardware.com/news/intel-100-series-hsio-chipset,30210.html

 

[ShintaiDK]

How is this a surprise for anyone? Its always been so on the mainstream platform and partly on the HEDT/server. Broadwell, Haswell, Ivy Bridge, Sandy bridge, Lynnfield etc.

Its exactly the same for AMD as well. Both FM series and AM series.

 

[dark zero]

And now they are defending something that Intel might really.screwed up?
That's totally nuts now.... I am thinking if Kabylake is the true Skylake after all...

 

[Anteaus]

How is this a surprise for anyone? Its always been so on the mainstream platform and partly on the HEDT/server. Broadwell, Haswell, Ivy Bridge, Sandy bridge, Lynnfield etc.

Its exactly the same for AMD as well. Both FM series and AM series.

Not really a surprise but perhaps it can settle some minds within the X99 versus Z170 chatter that has been occurring for the last few months. The drop in DDR4 prices have nulled out most of the price different between X99/5820K and a Z170/6700K builds, thus making it harder for people to decide what to do. For mainstream users Skylake is the obvious choice, but for enthusiasts it isn't so clear cut.

With most systems being GPU limited and not CPU limited lately, I think chipset decision carries more weight than in previous years. Raw, single core performance isn't everything.

 

[Arachnotronic]

And now they are defending something that Intel might really.screwed up?
That's totally nuts now.... I am thinking if Kabylake is the true Skylake after all...

Come on, dark zero, can you at least try to contribute something worthwhile?

The Kaby Lake PCH is just the Z170 with USB 3.1 support. If the Skylake chipset is "really screwed up" then so is the Kaby Lake one.

 

[ShintaiDK]

By USB 3.1, do you mean G1 or G2

Would be easier if they just called it 3.1 and 3.2.

(Z170 supports USB 3.1 G1.)

 

[MrTeal]

How is this a surprise for anyone? Its always been so on the mainstream platform and partly on the HEDT/server. Broadwell, Haswell, Ivy Bridge, Sandy bridge, Lynnfield etc.

Its exactly the same for AMD as well. Both FM series and AM series.

It shouldn't be, that's part of why it's important to actually research the motherboard you want to buy to see how the processor and chipset PCIe lanes are configured. Listing specs that are a maximum but not available in all circumstances isn't exactly limited to Intel and AMD either. A new Ecoboost F-150 can do 0-60 in under 6 seconds, and can tow 12,000 lbs. You might walk away disappointed if you go in expecting to get to 60mph that quickly while towing a full load.

 

[Eug]

I am not sure I fully understand the article, but from what I can get from it, it's largely a non-issue for most end users.

 

[Wall Street]

Several sites showed the FlexIO diagram in their launch article that Tom's shows today. The fact that this wasn't understood by Tom's motherboard editor just shows how far that site has fallen. In one article Tom's criticized Biostar for not hooking up 8 electric lanes from one of the PCI-E slots to the PCH. Just shows that site has no idea how a motherboard works. Good think that some other sites actually get it.

The basic idea is that the chipset is a hub for PCI-E devices. It has 4 lanes upstream and 24 lanes downstream. FlexIO let's the motherboard maker choose if the downstream lanes to be USB 3.0, SATA, Ethernet or PCI-E slots. Because 4 lanes can only be USB 3.0, they market it as having up to 20 lanes of PCI-E. The diagram in the article is important because only certain lanes can be used for certain connections (for example, only five of the lanes can be used to connect an Ethernet controller to the internal MAC).

 

[dark zero]

Come on, dark zero, can you at least try to contribute something worthwhile?

The Kaby Lake PCH is just the Z170 with USB 3.1 support. If the Skylake chipset is "really screwed up" then so is the Kaby Lake one.

Remember Sandy and Ivy... They might be compatible. However, they might have different features.

 

[Ken g6]

The first image in that article cleared something up for me. The processor itself has its own set of 16 PCIe lanes for the graphics card(s), which can be divided up into 2x8 or 1x8 + 2x4. This discussion is only about the PCIe lanes on the chipset, which are a separate set of up to 20 lanes, plus 6 dedicated USB 3.0 lanes.

As long as FlexIO isn't eating into the graphics card bandwidth, I don't see a big problem here. I guess that the issue of a second M.2 SSD eating into available SATA ports is there; but how many super-fast M.2 drives do you really need on a consumer board anyway?

 

[Insert_Nickname]

The first image in that article cleared something up for me. The processor itself has its own set of 16 PCIe lanes for the graphics card(s), which can be divided up into 2x8 or 1x8 + 2x4. This discussion is only about the PCIe lanes on the chipset, which are a separate set of up to 20 lanes, plus 6 dedicated USB 3.0 lanes.

As long as FlexIO isn't eating into the graphics card bandwidth, I don't see a big problem here. I guess that the issue of a second M.2 SSD eating into available SATA ports is there; but how many super-fast M.2 drives do you really need on a consumer board anyway?

Problem is the DMI 3.0 is in fact just a PCIe 3.0 x4 connection, which everything connected to the PCH has to share. If you connect a fast PCIe SSD to the PCH it could potentially (unlikely in practice, for now at least) use all available bandwidth for itself. It doesn't matter how many FlexIO ports the PCH has, because everything has to go through that DMI 3.0/PCIe 3.0 x4 link. Its quite easy to fully saturate a DMI 2.0 (PCIe 2.0 x4) already.

For my own part, this has killed any thought on a Z170 platform upgrade before it even launched. My next upgrade is HEDT (Skylake-E).

 

[Phynaz]

Thread title is deceiving. Here's the actual article title.

Intel's 100 Series Platforms Feature Less Connectivity Than You Might Expect

There's no news here. I/O ports are flexible, and it's up to the motherboard manufacturer to determine how to partition them.

Anandtech covered it all here:
http://www.anandtech.com/show/9582/intel-skylake-mobile-desktop-launch-architecture-analysis/4

 

[VirtualLarry]

For my own part, this has killed any thought on a Z170 platform upgrade before it even launched. My next upgrade is HEDT (Skylake-E).

But if the Skylake-E chipset is just the Kaby Lake PCH, and the Kaby Lake PCH is just the Skylake PCH, with USB3.1 G2 support, then where does that leave you?

 

[Arachnotronic]

But if the Skylake-E chipset is just the Kaby Lake PCH, and the Kaby Lake PCH is just the Skylake PCH, with USB3.1 G2 support, then where does that leave you?

With 48 lanes on the Skylake-E CPU?

 

[Insert_Nickname]

But if the Skylake-E chipset is just the Kaby Lake PCH, and the Kaby Lake PCH is just the Skylake PCH, with USB3.1 G2 support, then where does that leave you?

Well, Arachnotronic really answered for me, but...

With 48 lanes on the Skylake-E CPU?

Even with the current LGA-2011v3 platform (40 lanes), using the CPU PCIe lanes I can hook up a PCIe 3.0 x4 SSD (think something like the new 950PRO), an additional 10Gbit USB 3.1 controller and a 10Gbit Ethernet controller if needed, while still have one (or two) full bandwidth PCIe 3.0 x16 slot for graphics.

The rumoured PCIe 4.0 support is really just icing on the cake... :biggrin:

 

[Shivansps]

Is a non-issue, it only limits the number of chipset PCI-E lanes, you still have all CPU lanes.

And if the Z170 still allows up to 9 PCI-E lanes after everything is used it still leave you with a X4 PCI-E that can be used for a SSD or dgpu like has been done on Z67, Z77, Z87, Z97, and you still have plenty left for x1 pcie-e or even a second x4 pci-e.
It also allows the H170 to have a secondary x4 pci-e as well.


The CPU PCI-E has nothing to do with it, and it can be still be configured as 1x16, 2x8, 1x8, 2x4....

Althought its something to worry about when we move intro SOC on mainstream.

 

[ioni]

From looking at that diagram, how is USB 3.1 supported? Are 2 lanes used, wasting 6 Gbps?

 

[utahraptor]

This has me confused. Does this mean that if I have say a single 980 ti taking 16 lanes and a single nvme ssd taking 4 lanes then there is nothing left over bandwith wise? Does that mean any sata/ethernet/usb connection is taking away lanes from the video card?

 

[MrTeal]

This has me confused. Does this mean that if I have say a single 980 ti taking 16 lanes and a single nvme ssd taking 4 lanes then there is nothing left over bandwith wise? Does that mean any sata/ethernet/usb connection is taking away lanes from the video card?

Only if you actually have a x16 slot that's connected to the chipset, which would be pretty useless since it would be limited by the CPU/chipset interface. Generally your M.2 drives, SATA/SATA Express and USB will be connected to the chipset along with some x1 or x4 slots, and the x16 GPUs will be attached to the CPU directly.

 

[ShintaiDK]

This has me confused. Does this mean that if I have say a single 980 ti taking 16 lanes and a single nvme ssd taking 4 lanes then there is nothing left over bandwith wise? Does that mean any sata/ethernet/usb connection is taking away lanes from the video card?

Your graphics card is always full speed.

But everything else is shared on an x4 PCIe 3.0 aka DMI 3.0.

Visual view:

 

[Anteaus]

From what I understand, 16x, 8x, and 4x PCI-E slots were traditionally tied directly to the CPU and 1x were handled by the chipset. SATA ports are also traditionally handled by the chipset. What has happened with Skylake is that they have offloaded much more to the chipset, which can carry performance penalties with it.

Things were fine when the only thing people used PCI-E for was GPUs, but now those lanes need to be shared with with high speed storage such as SAS/SATA controllers (often 4x or 8x PCIe) or PCIe SSD solutions like the Intel 750 (4x). These ports have to come from somewhere and for max performance need to come from the CPU directly.

This conversation really isn't about ethernet, audio, USB, etc because those have generally been provided by the chipset anyway. Ultimately, it's all of the new high speed storage solutions that demand fast lanes that are causing the commotion.

 

[ShintaiDK]

That's not correct. Nothing touches the graphics speed.

Even easier to show on the H170 since there isn't any SLI/CF support.

 

[utahraptor]

So does having things turned on in the bios automagically steal bandwidth or does only the actual utilization of the devices. For instance, does every movement of my USB mouse slow down the 4x nvme drive a tiny bit? Does having sata enabled immediately slow things down or only using the drives attached?

 

[ShintaiDK]

So does having things turned on in the bios automagically steal bandwidth or does only the actual utilization of the devices. For instance, does every movement of my USB mouse slow down the 4x nvme drive a tiny bit? Does having sata enabled immediately slow things down or only using the drives attached?

You are not going to get something useful out of turning stuff off.