Question Thoughts on methods of evaluating CPU and CPU core PPA?

[Geddagod]

Ways of measuring Area- including L2, SLC?
Ways of measuring Power- what sort of workloads for evaluating CPU and "CCX" power?
Ways of measuring Performance- what sort of performance and at what tiers of power should performance be evaluated?

 

[Geddagod]

Area
Two measurements I think are the most important: CCX and Core only (not including core private L2/L1.5)
CCX encapsulates the entire CPU area of the SOC
Core only area to evaluate specifically the core IP itself.
The reason I did not include the L2 (despite it being core private) is that larger and larger L2s have been growing decently larger for minimal increases in IPC. The biggest reason for the increase in L2 capacity, from many companies including ARM, Intel, and AMD, are for reducing fabric/L3 power, not just for increasing core performance/power. IPC changes from increasing L2 capacity are often low single digits, disproportionate to the % increase in core area. Counting this in CCX area, IMO, makes more sense than just core area. It also solves the problem of how to evaluate shared/private L2 caches.
L2's also tend to change dramatically more in the product stack (server vs client products) than much more fundamental features such as the L1. Even intergenerational uplifts tend to change the L2 capacity, and thus area, much more frequently than L1. ARM also tends to have configurable L2 configurations in their products for designers to choose.
This is pretty contrary to the, IMO, common notion that L2 should be included in core area, which is why I elaborated so much on why I think not including it for core area but including it in the equally important CCX area metric makes more sense.

Special structures/cases:
3D stacked V-cache has minimal performance help in most standard benches such as Geekbench or Spec2017. Should not be counted, perhaps added with an asterick.
SLCs have mostly been used by companies to aide the iGPU or for other components of the SOC like the NPU. Unsure for Apple, but this seems to be the case for both Intel and AMD.

Ideally all info (area of different sections of the CPU core itself, then all levels of caches, then CCX) should be measured, however because of the impossibility of that happening (due to the large amount of work that would have to be undertaken to compile all that info), I believe the method of evaluating area makes the most sense.

I would be glad to hear everyone else's thoughts about this.

 

[DaaQ]

I'm not sure. But in the adrenaline drivers metrics overly there are quite a few options for power per core ppp ect. Also I think socket power.