Thanks to everyone that's responded with feedback to some of my other posts regarding my new system build. Now I'm down to the RAM and I'm trying to understand why a 1:1 ratio is so desired for a setup.
Currently, I've found my setup to fit quite nicely at no more than 3,720 Mhz @ an 8x Multiplier on a 465 Mhz bus. 3.8 fails all the way up to 1.4 v on the core and I don't know if I'm willing to push it past that. Still debating.
Anyway, I could probably achieve the same thing with a 7x multiplier @ 533 Mhz putting my memory at 1066 Mhz and a 1:1 ratio. I did some tests on the previous setup with a 4:5 ratio and a 1:1 ratio. At 8x and 465 Mhz, the 4:5 ratio puts the memory at 1,160 and the 1:1 was 930 Mhz.
In Sandra, it tested the latency of the 4:5 ratio to be about 12 ns faster and the ALU and FPU tests were a good 1,000 points better. Granted, I know these are benchmarks, but that still begs the question of why it's better?
I'm guessing that the 1:1 allows for less latency on the CPU to retrieve data from the memory for the offset of non-synced passes on the clock?? I searched around for any reveiws on this subject or posts in this forum and I basically only found that people said to do it but not for why.
Thanks!!!
Currently, I've found my setup to fit quite nicely at no more than 3,720 Mhz @ an 8x Multiplier on a 465 Mhz bus. 3.8 fails all the way up to 1.4 v on the core and I don't know if I'm willing to push it past that. Still debating.
Anyway, I could probably achieve the same thing with a 7x multiplier @ 533 Mhz putting my memory at 1066 Mhz and a 1:1 ratio. I did some tests on the previous setup with a 4:5 ratio and a 1:1 ratio. At 8x and 465 Mhz, the 4:5 ratio puts the memory at 1,160 and the 1:1 was 930 Mhz.
In Sandra, it tested the latency of the 4:5 ratio to be about 12 ns faster and the ALU and FPU tests were a good 1,000 points better. Granted, I know these are benchmarks, but that still begs the question of why it's better?
I'm guessing that the 1:1 allows for less latency on the CPU to retrieve data from the memory for the offset of non-synced passes on the clock?? I searched around for any reveiws on this subject or posts in this forum and I basically only found that people said to do it but not for why.
Thanks!!!