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Tbred really is a dumb shrink of Palomino!

MadRat

Lifer
Review

The aforementioned review shows a picture of the Thoroughbred (Tbred) next to the Palomino. It really does look like AMD did a simple (I know its a minomer) shrink of the Palomino for the Tbred. Makes me wonder what went wrong that the process didn't go near as smooth as they had hoped. The layout for Tbred looks identical to Palomino except for the location of the L2 cache. Its supposed to be a 33% size reduction although it looks closer to 50%!
 
I've been thinking for a long time that AMD relied upon a simple dumb shrink of the Palomino core, if so that could easily explain much of the apparently poor clock scaling evidenced with TBred's in the market thus far.

In the switch from ThunderBird-Palomino, the core was heavily optimized in layout for the .18u process generation, I'm betting the severely impacted critical speed paths in the die shrink.

AMD's official statements seem to indicate otherwise, but I don't believe they've come straight out and said one way or another. They have indicated there was 'some' sort of issue with the TBred core, but the .13u process itself was yielding within expectations.

If they were wrapping up working on a re-layout of the core around the time they initially launched the TBred one might expect to see the 'new' TBred's in the market within weeks.
I doubt that'll happen though, as it would mean an awfully quick transition period... plus the first layout would have had such a small distribution I bet it would lead to a hefty amount of wasted resourced and cash flow.
 
Actually I believe there are some differences. As you mentioned, the L2 cache is located differently. Also, AFAIK, they've managed to reduce the transistor count by a bit too. IIRC, the new layout also prepares it for the impending Barton release, with its extra 256KB L2 cache.
 
If they add 256k of L2 cache on BARTON then I wonder if it will be dropped in about the same location where it was on PALOMINO. Otherwise if they put it in the existing location and the old location then they may as well create a 768k L2 cache by adding a third bank.
 
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